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Hello,
I have a vhdl module that reads the inputs from files located in the project directory.
I wanna change them to remote files on the server.
the local file is in the same directory and has ./user/etc./test_data
and the remote file is on the server and is in a different directory...
something like this :
module (input, output);
reg input [n+1: 0];
parameter M ; // replicating factor
parameter n; // the width of the input
reg output [M*(n+1) :0];
integer i, j ;
initial begin
for(i = 0; i < n ; i = i + 1)
for(j = 0; j < M ; j = j + 1)
= input[i];
assign...
so in my case it would be something like :
module (input, output);
wire input [n+1: 0];
parameter M ; // replicating factor
parameter n; // the width of the input
wire output [M*(n+1) :0];
integer i, j ;
initial begin
for(i = 0; i < n ; i = i + 1)
for(j = 0; j < M ; j = j + 1)
=...
that is exactly the obstacle
What I want to do is :
assign output [M*n : 0] = append (M*input[n], M*input[n-1]....................., M*input[0] )
how should i define this??
I know how to do it if i give M and N values but I do not know how to do it with parameters
where should i start...
I wanna replicate every bit of the input and write it all out
something like this :
module (input, output);
wire input [n+1: 0];
parameter M ; // replicating factor
parameter n; // the width of the input
wire output [M*(n+1) :0];
integer i ;
initial begin...
Hello all,
I want to be able to enable and disable memory segments with control signals.
example:
making 0x0800 0000 to 0x0900 0000 accessible with test_signal_1 == 1
how can i do that ( in verilog but VHDL is ok too) ??
thanks in advance for any reply
Hi all,
How can I change the memory address automatically in verilog??
example : I want remap the data on this address "0x0B00 000" to "0x0001 9C00"
thanks in advance
thanks for the reply ,
what i want to do is reading the data from ROM and the ROM is 128K so i need another way to do this
( let's say with two variables size and start address of the segment)
and I want to be able to access and mask the partitions with different conditions.
how can i do that?
Hi all,
I wanna be able to write certain data in certain segment ( from a start address to a certain end address) of ROM and with control signals make them accessible.
How can I do that?
thanks in advance
oh ok
thanks
will get back to you
---------- Post added at 09:34 ---------- Previous post was at 08:59 ----------
it has:
#include "Compiler.h"
#include "HardwareProfile.h"
#include "uart2.h"
where can i find these files?
it communicates via RS232 and it uses two buffers (WriteRxBuf ,WriteTxBuf)
to write in the circular buffer of the UART and two buffer (ReadRxBuf ,ReadTxBuf)
to reads from the circular buffer.
which one should i use to write into optical device and which one should i use to read from it...
i have an optical device i want to set some values and read the data
i can debug using MPLab
but I have 4 buffers of the optical device and 2 buffers from my uart
which one goes where?
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