Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by casual

  1. C

    calculate digital accumulator gain?

    how to calculate digital accumulator gain? If the 512 counter is used? 1/512?
  2. C

    VCO: corner frequency vs cut-off corner frequency

    when we say "flicker corner freq of a vco output phase noise", does it refer to the slope of 1/f^3 or the boundary between 1/f^3 and 1/f^2 (cutoff corner freq, i think). It does cause me confusion. wiki: corner freq = cutoff freq when the simulated pnoise (spectreRF) freq waveform labels the...
  3. C

    how could I verify the PLL loop bandwidth in the schematic s

    I have done the matlab sdomain analysis and set the PLL bandwidth accordingly. how could I verify the PLL loop bandwidth in the schematic simulation? Could i obtain H(s)=out/in, transfer function of the PLL to check PLL loop bandwidth & overshoot (OS)?
  4. C

    Is extracted Cdg including Cgdovl

    I would like to know whether the extracted Cdg including Cgdovl and extracted Csg including Cgsovl or not? I am using spectre to extract those capacitance by using OP command. model is bsim3v3
  5. C

    does clk input of a typical D-latch need source followers a

    does clk input of a typical D-latch need source followers as a level shifter?
  6. C

    NMOS LC VCO type with bottom tail vs no tail current

    What are the pros and cons betwwen NMOS only LC VCO type with bottom tail biasing and without any tail biasing??
  7. C

    NMOS LC tank with top tail vs bottom tail

    Hi, I have seen two types of NMOS LC tank circuit. One with top tail (current source) and the other type, the current source (tail) at the bottom. what are the advantages and disadvantages between them? any related papers discuss this?
  8. C

    Michael Perrott Diffamp script

    how to simulate in CPPsim?
  9. C

    Cgs, Cgd are not available in AC mode in spectre

    here is the HSPICE netlist from Michael Perrott diffamp (part of it) Vsup vdd 0 vsupply Vgnd gnd 0 0 Ibias vdd vd ibias ac 1u .options post=1 delmax=5p relv=1e-6 reli=1e-6 relmos=1e-6 method=gear .dc w 0.25u 100u 0.25u .ac dec 1 1e1 1e2 sweep w 0.25u 100u 0.25u .op .probe dc lx7(M0) lx8(M0)...
  10. C

    Michael Perrott Diffamp script

    I found that Michael Perrott has a matlab script to calculate CML diff amp design from https://www.cppsim.com/download_hspice_tools.html However the script needs input from HSPICE simulation information like current density etc.. Could I use it in Spectre Cadence? Basically, i am not sure...
  11. C

    what are the differences between mmsim611 vs mmsim71

    what are the differences between mmsim611 vs mmsim71 What are the advantages to use mmsim71? will the transient simulation be faster?
  12. C

    how to sweep corners in cadence ADE?

    I know how to change corners as in model library... the problem is to sweep corner instead of changing manually
  13. C

    how to sweep corners in cadence ADE?

    I am using cadence 514 version i think. there is a parametric analysis function, but i could not sweep corners like ss, typical ff. how could I make it beside ocean script?
  14. C

    What is the justification to use RFCMOS vs normal digital CM

    Re: What is the justification to use RFCMOS vs normal digita what do u mean by "close-coupled layout and schematic based sims" Does it mean postlayout run? I did.

Part and Inventory Search

Back
Top