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I did not get fully what you said.
For integrated 22nm technology, Rds(on) is not specified there. Therefore, I have to extract it on my own depending on my current requirement (which I know). Now I just want to get the Rds(on) for input and supply voltage and based on current output...
Hello,
I need to size LDPMOS and LDNMOS in 22nm technology for switching circuit. Now How can I find the RDSon in cadence virtuoso for the MOSFETs? DC operating point is not giving me any value for it. Is there any way to simulate? Can anyone elaborate and explain me please?
I am designing integrated DC-DC converter with multiple output. As I am new to Analog design, I am trying to figure out what type of circuit topology is to be used for high-side and low-side switches. High-side is a pmos and lowside is a nmos switch. I am using 22nm technology with typical...
I am trying to design a basic circuit block of inverter (Analog circuit) in Cadence Virtuoso schematic in 22nm technology. It will be used for non-overlapping clock generator. I need to size the P-MOS and N-MOS. To choose a preliminary size, I can do parametric simulation of varying W with...
Thanks timof. I realized the thing that I wanted is not possible in schematic level for transistors. Thoguh I have no idea about the term of "stacked devices". Can transistor be stacked device in the model so that it can be used in schematic?
I am trying to figure out to set multi-fingers (nf = 3) for MOSFET (both p-mos & n-mos). I know I can increase the length directly. As connecting MOSFET in series increases length, can I somehow configure the finger properties (nf > 1) of MOSFET in such a way that S/D of each finger connects as...
Hi,
I want to do differential TDR simulation in cadence virtuoso. I have a differential channel, made of Tlines and interconnects (passive components). How to setup the TDR simulation to get impedance over time? I know, I have to terminate both n and p channel with 50 ohms each at the output. I...
Hi,
I am trying to crerate a electrical model (schematic) of a ferroelectric varactor in cadence virtuoso. This model is actually will be processed later and used in VCO for RF and mmwave application. The ferroelectric material is HFO2 (Hafnium-oxide) but BST based is also fine. I found a...
Hi,
I have created stripline/microstrip transmission line in ADS using Controlled impedance line designer (CILD). Now I want to extract the RLGC equivalent parameter file of that created transmission line. I know in the CILD option there is given RLGC parameter for single point. As RLGC...
Hi,
I am trying to design high-speed channel for SERDES transceiver while the package should be FCBGA as one part of my thesis. I am looking for equivalent electrical parameters for FCBGA to PCB trace. I tried in IEEE and google to look for some design specification for the electrical parameters...
Hello,
I need help quantifying Eye Diagram. I have to quantify Eye Diagram at the end of my Thesis for my Serial Link channel. Viewing an Eye Diagram, I can say probably whether it is bad or good. But for the hypothesis or any conclusion qualitative analysis is not enough. I need to have...
I did FFT of a signal in MATLAB. But now I am confused how to normalize it. Whether it should be N or sqrt(N) where N is the length of the signal. Can anyone tell me why & when N or sqrt(N) should be used to normalize?
I have also a basic question. Do we normilize while doing FFT or we...
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