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Why does the noise figure increase in my AT31011 design?

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ahmer saeed

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increasing noise figure

I am using AT31011 for LNA .AT Vce=2.7v&Ic=1ma the S parameters are specified in the data sheet.But when I biased the BJT at Vce=2.7v & Ic=ma,the S parameters deviate.Please mention me the mistake which most probably the designer did.
 

What is the degree of deviation? The S-parameters provided by the manufacturer normally doesn't not include the effect of device grouding (if you ground the chip using Via holes), therefore the S_parameter will deviate slightly. BUt your subject is "increasing noise figure". What is the problem that you are facing? Please specify your problem in detail.
 

Re: increasing noise figure

NF will increase with increased Ic according to the data sheet:

**broken link removed**

But increased Ic will give higher gain and higher 1 dB comp point. So it depends on your application. Shall gain be sacrified for improved NF or vice versa?

Vce 2.7 V, Ic 1 mA seems to give the lowest NF.
 

Re: increasing noise figure

Hi,
Noise figure is not always the best at the maximum gain. There is usually 0.5 - 1 dB difference gain bwteen the points. You may have to choose between best NF and best Gain. Choose the one that is needed and proceed. These data may be usually got from data sheet.
BRM
 

Re: increasing noise figure

hi,

Match the Tau S to Tau Opt can get optimal noise figure
 

Re: increasing noise figure

you can use ads example.
 

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