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What is the exact design flow of any digital chip?

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bharat_in

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What is the exact design flow of any chip?
I only know abt verilog coding and than at the end something like, tape-out of chip occurs, but what comes in between, and what after the tape-out?
 

Re: Digital Design Flow

hi.u have specified u know verilog coding.this is done to write a HW description and use a simulator to verify the functional analysis.after this synthesis of the code is done using synthesis tool then timing analysis(delay,slack,critical path observation etc) if satisfied with timing then back ebd part that is placement,floorplan,routing etc or done then to tape out.


to know more of design flow in vlsi go though any doc of xilinx/cadence/mentor etc.i hope this helps u to explore.
 

Re: Digital Design Flow

thank you.
Recenlty i heard about ECO, what does that mean?
 

Re: Digital Design Flow

generally, the design can be top down or bottom up.

top down - from higher level abstraction to lower level. behavioral spec to gate layout then fabricate.

bottom up - from lower level to higher. from gate layout to system function.

if u know verilog, it is the behavioral level spec in the design process.
 

Re: Digital Design Flow

Recenlty i heard about ECO, what does that mean?

Hi,

You can find a lot of information on ECO in this page (ASIC design). Type ECO in search box and walla..:D.
Below is the link which I find it very good explanation on ECO by yln2k2.



Hope it helps. Enjoy!
 

Digital Design Flow

Was nice link on ECO.
thanks for that.

Which one is the best tool for synthesis, and how can one get it, if one wants to work at home.
 

Re: Digital Design Flow

Design flow:

Behavioral Description-> Behavioral Synthesis-> RTL Description-> Logic Synthesis-> Gate Description-> Technology Mapping-> Technology Network-> Layout-> Mask Data-> Manufacturing-> Product-> Testing-> Good Product
 

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