What could affect MOSFET' s gate-souce break down voltage

[tia_design]

break a mosfet

Hi, All,

I'm using a CMOS process, in which there are two types of NMOS devices with the same gate oxide thickness. But their gate-source break down voltages are different. Why it is like that? Thanks for any information.

 

[erikl]

why does mosfet break

An STI between the gate and the source & bulk terminals achieves a higher gate-source break-down voltage.

 

[deepak242003]

why mosfet breaks down

An STI between the gate and the source & bulk terminals .

can u elaborate this point...?? does it mean STI between gate and bulk and source and bullk or
gate and source and gate and bulk..???

 

[erikl]

sti mask

Terminals in this order:
for a higher gate voltage only : bulk - source - STI - gate - drain
HV-MOS with high GS-voltage: bulk - source - STI - gate - STI - drain - STI - bulk

The STI requires that the electric field has to stretch around the STI, thereby "consuming" a lot of potential difference.
Of course the control behavior (transconductance) of such structures is much weaker than that of comparable non-HV-transistors.

 

[deepak242003]

what happens when a mosfet breaks down

i believe STI is not present between gate and source or between gate and drain in normal MOS......

is HVMOS constructed differently..??.. some reference documents will be highly appreciated....

 

[erikl]

Re: What could affect MOSFET' s gate-souce break down voltag

i believe STI is not present between gate and source or between gate and drain in normal MOS......

Right.

is HVMOS constructed differently..??..

Of course. There are several methods:

• thicker gate oxide (for higher gate voltage)
• guard ring(s) for voltage division between drain and bulk (for higher drain voltage)
• STI trenches (appropriate for both, s. my previous post)

The first method costs only transconductance (and, possibly, a further oxide mask + layer deposition), the other methods (additionally to smaller transconductance) need a lot more silicon area, and - the last one - instead of the (additional) oxide mask the STI mask + its etching process.

some reference documents will be highly appreciated....

I have this (including pictures) from the DR manual of our foundry, and this of course is classified info, sorry! But I'm rather sure you can find info about this topic if you search for papers on HV CMOS technology.

Cheers, erikl

 

[tia_design]

Re: What could affect MOSFET' s gate-souce break down voltag

Thanks erikl for your help

 

[deepak242003]

thanks erik.. i never worked on HVMOS... Iwilll get some paper via net for information..

cheers.