VHDL : 'Integer' range and its use

[GeekWizard]

Hello,

I know that integer's range is upto 2^31 - 1. But does this condition apply to the every number in the equation that would result in an integer ?

e.g.

signal factor : integer ; 

begin 

factor <= (2**48) / (300E6) ; 
factor_bin <= conv_std_logic_vector (factor,20);

2**48 is beyond integer range but the resulting value for factor is within. Still the ouptut is zero ! ?

I do not want to use 'real' as its in conflict with conv_std_logic_vector function.

Thanks!

 

[FvM]

It may depend on the compiler, but I guess integer range must be kept for any factor and partial expression. Otherwise, the compiler would use real internally and thus loose precision.

But using real for the factors and converting the results to integer shouldn't conflict with anything.

 

[firefoxPL]

I had similar problem with calculating values for phase accumulator

But does this condition apply to the every number in the equation that would result in an integer ?

unfotunately: yes you have to calculate the fragment of code in some other way, so that every product would be in proper integer range