saikat
Member level 2
vertex 4 serdes
I have a specific query regarding the usage of SelectIO/RocketIO SERDES features available in Vertex 4. I have gone through the Vertex 4 user guide and quite a few application notes related to them. What I have understood that these features are mainly applicable for high speed serial communication protocols like PCI express, SATA etc. They also have some special features like 8B/10B encoding/decoding built into the device for specific high speed serial communication applications.
In my application, I need to sample external data at high speed e.g. @ 2 ns (500MHz). I only need to sample the data at that high speed but I would process it inside FPGA at much less speed e.g. 100MHz. Since the SERDES blocks are having built-in serial-to-parallel and parallel-to-serial blocks, can it be used for acquiring data @ 2 ns? If I could configure a 5bit serial-to-parallel converter using SERDES, then I can easily process the parallel data out from SERDES in FPGA logic for further processing @ 100MHz.
Another point I would also like to clarify is that, does RocketIO feature only supports differential IO standards? The IO standard for my application might be LVTTL or LVCMOS which definitely are single ended and not differential.
I have a specific query regarding the usage of SelectIO/RocketIO SERDES features available in Vertex 4. I have gone through the Vertex 4 user guide and quite a few application notes related to them. What I have understood that these features are mainly applicable for high speed serial communication protocols like PCI express, SATA etc. They also have some special features like 8B/10B encoding/decoding built into the device for specific high speed serial communication applications.
In my application, I need to sample external data at high speed e.g. @ 2 ns (500MHz). I only need to sample the data at that high speed but I would process it inside FPGA at much less speed e.g. 100MHz. Since the SERDES blocks are having built-in serial-to-parallel and parallel-to-serial blocks, can it be used for acquiring data @ 2 ns? If I could configure a 5bit serial-to-parallel converter using SERDES, then I can easily process the parallel data out from SERDES in FPGA logic for further processing @ 100MHz.
Another point I would also like to clarify is that, does RocketIO feature only supports differential IO standards? The IO standard for my application might be LVTTL or LVCMOS which definitely are single ended and not differential.
