VDD/VSS % drop during IR analysis

[vikramc98406]

Can somebody tell me why do we use %drop,
usually 5% for VDD 5% for VSS
or 10% combining VDD and VSS

 

[suituse]

The IR drop rang you should care is related to the library you are using. If your cells working at voltage outside the library, no data is valid for your STA or else.

 

[vlsitechnology]

Tell me one thing vikram...How do u come to know that if ur ir drop is at one particular value then u shd reduce otherwise u shd not...These are the constraints given by the fab to us....So if we exceed 5% of vdd then there is no chance tht ur chip will work fine after fabrication so tht is the reason we vhv to follow that...
Hope u got this concept..........
Don't forget to push help button..

 

[vikramc98406]

Hi vlsitechnology,

for a moment lets say these % drops are given by FAB.
My question is, what is the basic idea with which even some % to be given by them.
I am trying to understand why to have these % drops to take into into account.
In ASIC world we cannot assume anything, for every number we use has a reason.

 

[vlsitechnology]

Sorry vikram its related to Fab i donno about that.