tapered buffer- rule of tumb?

[zitty]

Hey there,

I have to drive a big inverter with w/l>1000.
To be able to switch this inverter I´ll put several buffer stages in front.
Is there any rule of thumb how large the previous stage has to be with respect to the next one?
At the moment I don´t care about any delay around 500p or short circuit current of the buffer stages.
How can I calculate the no. of stages I need and their aspect ratio?

regards zitty

 

[dick_freebird]

Minimum chain delay, rule of thumb is a 3:1 taper factor.

For a power driver, there may be other interests. To get
maximum slew rate you might like a lower taper factor,
at least in the last couple stages. To eliminate final stage
shoot-through, you'd size predrivers asymmetrically and/
or use a split path with anti-shoot-through designed at
the head of it. To get a controlled voltage slew rate you
would undersize predrivers or resistor-limit them (giving
a Miller controlled slew rate).

 

[erikl]

How can I calculate the no. of stages I need and their aspect ratio?

Here's a 20-years-old paper on this: View attachment Optimum_tapering_for_Buffer.pdf