manoranjan sb
Newbie level 6
Hi
I am undertaking a project named "A VLSI architecture for image registration" an IEEE 2007 paper. Please suggest me some ideas to design the hardwares involved in that paper such as Address and control signal generator unit, Data fixer unit, window processor.
I am undertaking a project named "A VLSI architecture for image registration" an IEEE 2007 paper. Please suggest me some ideas to design the hardwares involved in that paper such as Address and control signal generator unit, Data fixer unit, window processor.