SDRAM interconnection test

[samsuffy]

Hi All!

I need to test the interconnection between a digital IC (in my case an FPGA) & a SDRAM chip.

Typical SDRAM test procedure consists in doing read & write access to the SDRAM in order to verify the SDRAM operation.
However, that kind of test needs a SDRAM controller, that I do not have (yet..)

I know that JTAG tester can operate the SDRAM chips at low speed by simply "playing" with the SDRAM signals (no memory refresh & so on...) & deduce if the SDRAM interconnection are good or not ...

Is there Anybody that know which algorithm is used to do that ??
Is there some test modes to activate on the SDRAM chip ? Is it standard between chip vendors ?
Where can I found the specification of such test modes ?

Thanks for your help !

 

[seanwu]

SDRAMs currently not suport boundary scan. You can use the FPGA to access the DRAMs. Anywhere, you can use a logic analyizer to debug the DRAM sub-system.