N.MIL
Newbie level 2
hello ,
i have designed a 100 Mhz , 5V ring oscillator using ams 0.35 technology. I added pads and during the schematic simulations phase everything works fine. I did the layout and after post layout simulation using the extracted circuit, my circuit wont oscillate . Does anyone have any idea how to validate lvs and post layout simulation with padring ?
i have designed a 100 Mhz , 5V ring oscillator using ams 0.35 technology. I added pads and during the schematic simulations phase everything works fine. I did the layout and after post layout simulation using the extracted circuit, my circuit wont oscillate . Does anyone have any idea how to validate lvs and post layout simulation with padring ?