field_catcher
Junior Member level 3
Hello,
I am using VSdir standcell to build a programmable divider for frequency synthesizer. The VCO clock is around 1GHz.
I constructed the schematic using symbols from the library. Now I need to layout the design (by which I mean connecting the standard cells as the cells are already laid out) . I have 2 choices: use Cadence First Encounter to automatically do it or just use the layout Editor to manually connect it.
As the frequency is not that low, I am afraid the auto rounter will degrade the performance, so I decide to manually connect those cells. Has anyone done this before? I have further questions to ask.
Thanks!
I am using VSdir standcell to build a programmable divider for frequency synthesizer. The VCO clock is around 1GHz.
I constructed the schematic using symbols from the library. Now I need to layout the design (by which I mean connecting the standard cells as the cells are already laid out) . I have 2 choices: use Cadence First Encounter to automatically do it or just use the layout Editor to manually connect it.
As the frequency is not that low, I am afraid the auto rounter will degrade the performance, so I decide to manually connect those cells. Has anyone done this before? I have further questions to ask.
Thanks!