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How to generate a 10KHz sine wave in VHDL and display it

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engrbabarmansoor

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sine wave

I have to generate a sine wave of 10khz in vhdl and display it on oscilloscope using fpga.

can any body tell me how to do so?
 

sine wave

FPGAs are digital devices. Therefore, you will need external resistors to sum up the outputs. Assume something like 8 bits of output data. Each output pin will have a different weighed resistor value. Look up the R-2R ladder network on the Internet. Now you must write a state machine that runs a multiple of the 10kHZ output and varies the 8 bit output data in such a manner as to generate the output waveform. You could also place the output bytes into an internal ROM and then just cycle through the ROM addresses to generate the waveform.
If you use the ROM approach, then you can change the output waveshape by simply varying the ROM contents.
 

sine wave

**broken link removed**
 

sine wave

Hi,
For generating Sine wave, u need to connect Digital to Analog Converter. u need to find values for generating sine wave. Apply those values into DAC, then control reference voltage of DAC. u can get sine wave in CRO.
 

sine wave

You could output a 10 kHz square wave, and pass it through an external analog filter that removes all the higher harmonics.
 

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