amisin
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I am new to VHDL programming, and I have written this code:
And I am getting the error: imagebin2dnastream.vhd(39): near "'": syntax error, in line (if (store(loopcount,loopcount + 1) = '00') then
)
Code VHDL - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 -------------------------------------------------------- library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; -------------------------------------------------------- entity imagebin2dnastream is generic(RR,CC: INTEGER := 2); port(Input: IN std_logic; Output: OUT std_logic ); end imagebin2dnastream; -------------------------------------------------------- architecture behaviorb2d of imagebin2dnastream is type type_binaryin is array (0 to 1) of std_logic_vector(31 downto 0); signal loopcount : integer; signal dnacount : integer := 0; signal binaryin : type_binaryin; signal dnaout: string(1 to 16); signal store: std_logic_vector(31 downto 0); begin store <= binaryin(0); process(Input) begin for loopcount in 0 to 31 loop if (store(loopcount,loopcount + 1) = '00') then dna(dnacount) <= 'A'; elsif (store(loopcount,loopcount + 1) = '01') then dna(dnacount) <= 'T'; elsif (store(loopcount,loopcount + 1) = '10') then dna(dnacount) <= 'C'; else (store(loopcount,loopcount + 1) = '11') then dna(dnacount) <= 'G'; end if loopcount := loopcount + 1; dnacount <= dnacount + 1; end loop; end process; end behaviorb2d; --------------------------------------------------------
And I am getting the error: imagebin2dnastream.vhd(39): near "'": syntax error, in line (if (store(loopcount,loopcount + 1) = '00') then
)
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