Help~~complexsignal in System Generator

[enigmaice]

Hallo all guys,

i'm working with the Xilinx SysGen and was building up a system for simulation. I have now a complexsignal and need to decompose this complexsignal into Amplitude and Phase.

How can this be achieved in SysGen???


Thanks in advance

 

[palai_santosh]

Can you tell more about your system or may be a block diagram of it. Its possible to do it.

 

[enigmaice]

ye~i wanna to have the amplitude and phase from complexsignal on sysgen. how to implement this?


thanks!

 

[palai_santosh]

i am bit confuged after looking at your block diagram.
Based on it i am commenting few things.
1. system generator will do the hdl sysnthesis fpr you on only the blocks you placed between "gateway in" and "gateway out". rest of all modules considered as black box.
2. the module you are mentioning is complex to phase and amplitude .. what are the sub blocks of this module? if it is pure HDL or all the sub modules are from xilinx system generator blocks then its ok you can ask systemgenerator to do your job.
3. You want to do simulation only or
simulation + fpga implementation.
or hardware in the loop


based on all these your block diagram may change.