hardware implementation of AES 128 bit

[dipika singh]

i want to implement aes algorithm with 128 bit i/p and 128 bit key on virtex 5 fpga board. can anyone suggest me how to implement it.. i've written the code. bt find it difficult during hardware implementation.. as the i/p and key size is too large..
plzz help mee if u have some idea.. :-?:-(

 

[TrickyDicky]

If it doesnt fit, then your device is probably too small, or you made some implementation errors.

How about posting your code?

 

[dipika singh]

can u suggest me, whether i can use hyperterminal to show o/p encryption..???