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Global defines in VHDL

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pastro

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Hi all,

I'm working on VHDL firmware for a project involving a bunch of FPGAs. Most of the FPGAs have similar firmware, with only things like their ID changing from FPGA to FPGA. I want to create a VHDL file with configuration data, where all constants specific to the FPGA are listed, and then have some sort of "include" statement to reference the constants in every VHDL module. What is the right way to do this?

Thanks!
 

You can place all respective constants in a package e.g. "defs" and import it in all design entities refering to it.

Code:
package DEFS is
CONSTANT MAJOR_VERSION: INTEGER := 0;
CONSTANT MINOR_VERSION: INTEGER := 16;
--
end package DEFS;

In the design files
LIBRARY work;
USE  work.defs.all;
The actual name of the defs file can vary, you can also implement a hierarchy of general defines and target specific definitions.
 
Note that this will require a re-compile/synth/PAR for each chip leading to a unique bitstream per chip. If the devices are actually identical except for a few parameters, one solution might be to allow those parameters to be loaded* after configuration and power-on-reset, but before the chip does any real work.

*loaded: some supervisor CPU with a write interface to each chip. or each chip has logic to pull config out of a config eeprom. or some other method.
 

If the devices are actually identical except for a few parameters, one solution might be to allow those parameters to be loaded* after configuration and power-on-reset, but before the chip does any real work.
Runtime configuration is an alternative of course, and in my opinion, it shouldn't be restricted to loading parameters "before the chip does any real work". But besides the overhead for configuration registers, it may involve a considerably higher logic element and routing resources requirement. The most important advantage, above saving compilation time is simplifying the software variant inventory.
 

There is also a case where software is developed independently of the firmware and it uses the version register to check compatability or see which features are available.
 

Something with low overhead might be to store the parameters for all possible chips in the 'bunch' in the bit file as array(s). Then use a few otherwise unused I/O pins to statically code for "which chip/function/ID am I?" Then your parameters := PARAM_ARRAY(to_unsigned(IdPins(5 downto 0));
 

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