Feedback circuit problem

[wenglao]

I got a problem regarding the bandwidth of my cicuit (fig 1 and 2)

the 50% risisng time is around 50us

fig 3 and 4 is the open loop AC analysis

I try to increase the bandwidth so I add a lead resistor in the integrator (fig 5) and fig 6 is the AC sweep after adding the resistor. The bandwidth increases from 500 kHz to 5 MHz

But when I check to tran response of the circuit (closed loop) (fig 7). The risiing time decrease. Can anyone tell me why ? thx for help

 

[pixel]

Settling time could be significantly increased if there were pole zero doublet around unity frequency in the open loop characteristics.
Step response has one fast edge (depends on bandwidth), and then slow edge as a result of doublet, which increases total settling time.

 

[wenglao]

what can I do to increase the rising time and decrease the setting time instead ?

 

[pixel]

what can I do to increase the rising time and decrease the setting time instead ?

As a first you have to find equation for frequencies of zero pole doublet. Then see if you could move zero -pole doublet to toward higher frequencies.
If pole and zero are not dependant then you could cancel them.