S_J_K
Newbie level 3
hello everyone!
i have designed the symbol view of cmos amplifier and now i am creating the layout of it. While checking the DRC rules , error named "tap area" is being observed. Can anyone help me in resolving this error?
regards
SJK
i have designed the symbol view of cmos amplifier and now i am creating the layout of it. While checking the DRC rules , error named "tap area" is being observed. Can anyone help me in resolving this error?
regards
SJK