How to simulate the effect of power supply noise in an amplifier using Cadence?

[Alipoursaadaty]

Hi everyone,

I want to simulate the power supply noise and its effect on an amplifier performance using Cadence Virtuoso. Is there anyone who knows how to do this?

I want to model its effect before fabrication and see how can I solve any upcoming problems.

Regards,

 

[BradtheRad]

Sometimes I introduce a square wave inline with a power supply. I put them in series (one or both must have two terminals). Noise might be 1/10 of a volt.

Another method is mixed (additive)... power supply voltage enters through a low-ohm resistor. Noise signal enters through a parallel resistor. Both resistors are necessary.

The noise frequency should be deliberately chosen not to resonate with any harmonic generated within your circuit.

 

[dick_freebird]

You can also do frequency domain PSRR by setting the AC properties
of the supply, or a secondary source with DC=0, AC=1. The HF PSRR
is often a key concern, telling you what your output filter must be
(or telling you that what's downstream, is "on its own" in conjunction
with real power source attributes like ripple.

 

[BigBoss]

Simple AC analysis (PSRR) will give you how much noise can be suppressed/tolerated from the power supply to output.

 

[Alipoursaadaty]

Sometimes I introduce a square wave inline with a power supply. I put them in series (one or both must have two terminals). Noise might be 1/10 of a volt.

Another method is mixed (additive)... power supply voltage enters through a low-ohm resistor. Noise signal enters through a parallel resistor. Both resistors are necessary.

The noise frequency should be deliberately chosen not to resonate with any harmonic generated within your circuit.

Thank you for your attention on this matter.

Would a low-ohm resistor be series with the power supply? I got a bit confused due to the two resistors. Will there be two resistors?

Regarding frequency of noise, I did not use any inductors in my circuit to have resonance frequency. However, the parasitics will lead the amplifier to resonate. In practice, noise that comes from outside of the circuit (power supply, environmental, etc) will have a component in each frequency. Therefore, it might be possible to resonate the circuit in the resonant frequency. Would you please let me know if there is a logical justification for this matter?

Regards,

--- Updated Feb 12, 2024 ---

Simple AC analysis (PSRR) will give you how much noise can be suppressed/tolerated from the power supply to output.

Thank you for your answer.

In the CMOS book written by Behzad Razavi, it's been mentioned that any mismatch in the fabrication will cause the high-frequency noises to come from the power supply and can be amplified at the output of the amplifier if the tail current source has a high impedance. By reducing this impedance it can be solved. However, the CMRR would be degrading by reducing the impedance of the tail current source (REE). Do you have any suggestions to solve both problems?

Regards,

 

[BigBoss]

In the CMOS book written by Behzad Razavi, it's been mentioned that any mismatch in the fabrication will cause the high-frequency noises to come from the power supply and can be amplified at the output of the amplifier if the tail current source has a high impedance. By reducing this impedance it can be solved. However, the CMRR would be degrading by reducing the impedance of the tail current source (REE). Do you have any suggestions to solve both problems?

Regards,

This statement has no sense at all. How process mismatch will cause a noise from power supply ?? What is the relationship between them ??
I didn't understand, sorry.
Can you mention the page number of Razavi's book ?? (you hopefully talk about his famous book).

 

[BradtheRad]

Simulations below depict my methods of combining noise and power supply.

Your mentioned steps as to what might lead to parasitic oscillations is as good as other explanations as to how such oscillations arise.

 

[Alipoursaadaty]

This statement has no sense at all. How process mismatch will cause a noise from power supply ?? What is the relationship between them ??
I didn't understand, sorry.
Can you mention the page number of Razavi's book ?? (you hopefully talk about his famous book).

Thank you for your attention.

The name of book is "Analog CMOS Integrated Circuits" written by Behzad Razavi.

Page 121 and page 200

As it has been mentioned there, high frequency noises come from power supply, can reduce the performance of the FDA.

--- Updated Feb 13, 2024 ---

Simulations below depict my methods of combining noise and power supply.

View attachment 188570

Your mentioned steps as to what might lead to parasitic oscillations is as good as other explanations as to how such oscillations arise.

Thank you for your complete response.

I understand. Regarding reducing oscillation possibility, would you please let me know if you have any information concerning circuit and layout design to prevent oscillation?

I designed a 5-stage amplifier and connected the GND and VDD nodes of each stage. Now, when I reduce the gain, the oscillation is getting ruined. However, it is arising for the high voltage gain.

 

[BradtheRad]

Regarding reducing oscillation possibility, would you please let me know if you have any information concerning circuit and layout design to prevent oscillation?

I designed a 5-stage amplifier and connected the GND and VDD nodes of each stage. Now, when I reduce the gain, the oscillation is getting ruined. However, it is arising for the high voltage gain.

I once made a stereo amplifier from a popular easy-to-use IC. Oscillations occurred when I turned the volume control way up. I had to try out different arrangements of my volume control potentiometer before I found one that worked. Don't know if oscillations arose from the power supply. Since then I read that op amps oscillate easily at high gain. Any number of causes can creep in.

I imagine certain amplifier types or amplifier IC's are better at hiding hum (voltage droops, etc.) in the power supply.