Differential Amplifier (Cadence & Simulation)

[blackdragon12]

Hey,

So I am given a task to design an amplifier with a current source which I have to design as well (but for now, I just want the amplifier to work, so I have used the default IDEAL CURRENT SOURCE symbol and set a value for it).

Do you guys have any tips? I have posted some pictures below of my circuit and simulation results.. any pointers? What should I use for my width and lengths for each transistor (because they are default right now)? I'm completely lost and any first step pointers would be appreciated.

I will outline my steps thus far:
1) Designed a simple amplifier with a ideal current source.
2) Left the W/L ratio as default (L = 100u, W = 120u).
3) Set VDC for the VDD to 1.8V
4) Set Ideal current source to 15uA
5) Ran a DC Sweep (For variable VIN from -1.5 to 1.5 with 0.01 step size (linear))
6) Outputs to be plotted are: + terminal for VIN and -VIN and the OUT pin.

What am I doing wrong? I dont even know if the results below are correct... any tips to check?

 

[Ramakrishna_444]

Step 1: Remove your current mirror and connect two voltage sources at two drains of diff-amp whose voltage is equal to your o/p common mode voltage(usually is half of vdd b/c symmetrical signal excursion) and place two voltage sources at Gates of diff-amp whose voltage equal to the value i/p common mode voltage. Then run DC analysis by sweeping your w of driver MOSFETS. You will get w value at your desired quiescent current.Place this value into ADE.
Step 2: Now connect Current mirror(w_mirror) then run the DC sweep.Note the corresponding w_mirror from graph at respective quiescent current and voltage.Place this value into ADE completes your design....
Quiesent current is 15/2uA=7.5uA.
Quiesent voltage is VDD/2=0.9v
These value are from your spec's these can be different for different requirements.............

 

[blackdragon12]

Step 1: Remove your current mirror and connect two voltage sources at two drains of diff-amp whose voltage is equal to your o/p common mode voltage(usually is half of vdd b/c symmetrical signal excursion) and place two voltage sources at Gates of diff-amp whose voltage equal to the value i/p common mode voltage. Then run DC analysis by sweeping your w of driver MOSFETS. You will get w value at your desired quiescent current.Place this value into ADE.
Step 2: Now connect Current mirror(w_mirror) then run the DC sweep.Note the corresponding w_mirror from graph at respective quiescent current and voltage.Place this value into ADE completes your design....
Quiesent current is 15/2uA=7.5uA.
Quiesent voltage is VDD/2=0.9v
These value are from your spec's these can be different for different requirements.............

Hi, thanks for the reply. I have a few questions:

When you say remove the current mirror, do you mean the current source? Or the transistors we have above the diff pair? Also, what do you mean by sweep our w?

 

[BradtheRad]

I made a simulation which is roughly similar.



I assume the supply is supposed to be positive polarity? (Your schematic has the supply as negative.)

I omitted the gate connections to V+ and ground. (It looked as though it was diverting the input signal.)

The input voltage causes the output to swing rail-to-rail. This is due to the small current source combined with the low supply voltage.

There is a visible slope at the zero transitions.

 

[blackdragon12]

I made a simulation which is roughly similar.



I assume the supply is supposed to be positive polarity? (Your schematic has the supply as negative.)

I omitted the gate connections to V+ and ground. (It looked as though it was diverting the input signal.)

The input voltage causes the output to swing rail-to-rail. This is due to the small current source combined with the low supply voltage.

There is a visible slope at the zero transitions.

Is there a reason why you used a resistor at the output node? Also, why did you use an AC 30Hz input instead of a DC?

 

[BradtheRad]

Also, why did you use an AC 30Hz input instead of a DC?

It's the lazy way to apply a range of input volt levels.

And it makes a smoother waveform than if I were to mouse a potentiometer slider back and forth.

Is there a reason why you used a resistor at the output node?

It's useful to attach some kind of output, because that is commonly done in real life.

It's helpful to see output polarity and amplitude visibly, by seeing the direction of flow.

And by experimenting with the load, it brings out the concept of a current mirror. I tried different values at the output. All had 15uA going through them.
The low ohm load had a low output voltage.
The high ohm load had a high output voltage.

However using a current source can make funny things happen. I'm scrutinizing my circuit. I'm not sure the load is hooked up in a realistic manner. Notice the current source goes to ground. My load goes to ground. Volt level on the load is negative (at this point in the input cycle). Current flows up through the load and down through the current source.

However a real-life circuit would not ordinarily allow this. Because it would not normally have a power supply in the place of the current source.

 

[Ramakrishna_444]

Remove current Mirror Load (The transistors we have above the diff pair.
It is actually "Sweep over w " means vary the w over the permissible range....

 

[blackdragon12]

Hey,

So what I did was an AC sweep (logarithmic) and I got a gain of about 1.6V. I guess it works, cause if I change my aspect ratios for the transistors, I get an even bigger gain.

So now the question is, how can I optimize this? Should I have a bigger resistance value, or a adjust my W/L to improve my gain?

 

[YASWANTH_802]

Hi,

Can you upload the file of revised version of differential amplifier circuit for which you got gained output.