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Design a 24-bit mutiplier

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Nhan95

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I am designing a multiplier circuit using Modified Booth Algorithm, I examine group of 3 bit to generate a partial product, so I have total 13 partial product. The product will be 48 bits. I'm stuck at the sum circuit. My idea is to use 48bit Carry Lookahead adder to sum al partial product but It seem to be waste. Is there any other way to sum all 13 partial products effectively. Thanks
 

thats not is a good idea to use carry lookahead adder to sum partial products. search for "wallace tree" ,"dadda tree" , 5:2, 4:2 compressors ... and you'll find better method
 

I was stuck with multiplier ? please help me

In floating point multiplication, when we multiply the mantissa, we have to add bit-1 on the left of mantissa to make a 24-bit binary. But if I do that and using Booth algorithm, It'll be wrong because the booth algorithm works with signed number. We have added bit-1 before the mantissa, so it is automaticlly see that as a signed number.
I am struggle with this problem. Please help me. Thanks so much.
 

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