Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

DDR3 memory Interface

Status
Not open for further replies.
R

rocking1234

Member level 1
Joined
May 2, 2009
Messages
36
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,288
Location
India
Activity points
1,535
Hi
I am desiging for a ddr3 memory interface controller for 1GB micron DDR3. I have attached the micron IGB Functional Block diag. It says 1GB : 128M X 8.

The problem is how do I fix the row address and the column address. I know that for one DDR3 consist of 8 bank. So to fix the address 3 bits are used of bank addressing and I am confused how to choose the Row address and column address.

Any help would be very much appricitaed .
 

hi...if im not wrong...the row address and the column address has being mention the micron datasheet..or you can get it in the JEDEC spec (JESD79-3D) in page 29.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top