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constraining a generated clock that is also an output?

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casey480

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i have a generated clock 'i_clk' which is a divide by two created from a flip flop clocked by 'user_clock'

thus, i have the following constraint:

Code:
create_generated_clock -source [get_pins user/user_clk_mux/O] [get_pins user/i_clk_reg/Q] -name I_CLK -divide_by 2

i_clk is also an output of the module. my question is, how do I constrain that output?

i currently have

Code:
set_output_delay -max 16 -clock I_CLK {i_clk}

however, I get min timing violations on that port. Am I doing this correctly?
 

set_output_delay -min 16 -clock I_CLK {i_clk} may fix it but I don't think set_output_delay is the proper way to constraint output clock (its usually for data paths and not clock paths). If you have a certain timing to the output you have to meet you can use set_max_delay/set_min_delay
 

    casey480

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