master clock and generated clock constraints

[Ashokb431]

Hi, I've few doubts on SDC Commands

1. Is it possible to generate generated clock without having master clock?
2. If yes how to give the constraints to the generated clock and if we're giving constraints to generated clock, then whether these constraints are scaled for master clock?

 

[maulin sheth]

1. Is it possible to generate generated clock without having master clock?
>> It is not a good idea to create generated clock without master clock. There are two options we have.
-> option "-source" : so STA tool know the sense and behavior of the clock, what is the time period as generated clock does not have any option to define the clock period and waveform.
-> "master_clock" : if generated clock has multiple fanin clocks then we need to define the master clock to avoid timing through unnecessary paths.