Accessing CONFIG1L register in PIC18F4550

[bliscar]

Hi,

I am working on a problem in which I have to set the last three bits(2-0) of the register CONFIG1L (which are PLLDIV2, PLLDIV1 and PLLDIV0) through the code section of my program(e.g. as I access TRIS registers) which is usually accessed and set by "#pragma config PLLDIV"statement.
But this register is at the address 300000h which is beyond the user program memory space. It belongs to the configuration memory space (300000h-3FFFFFh), which can only be accessed using table reads and table writes and not through normal procedures(programming the Configuration registers is done in a manner similar to programming the Flash memory) as we access TRIS or PORT registers.

I am using MPLAB-X as the environment and C18 compiler.

I have started reading the table read and write method from the PIC18F4550 datasheet, but still not getting any clue that how to solve the above problem and is it feasible to solve it???

Do anyone have any idea as how to solve it??????

 

[wp100]

Hi,

These are the 8 options, (3 bits 0-7) for PLLDIV, they should be set in the normal way with the other Config statements.


Why is it a problem for you ?


Assume you have already set CONFIG1H to a PLL source / crystal ?


;----- CONFIG1L Options --------------------------------------------------
_PLLDIV_1_1L EQU H'F8' ; No prescale (4 MHz oscillator input drives PLL directly)
_PLLDIV_2_1L EQU H'F9' ; Divide by 2 (8 MHz oscillator input)
_PLLDIV_3_1L EQU H'FA' ; Divide by 3 (12 MHz oscillator input)
_PLLDIV_4_1L EQU H'FB' ; Divide by 4 (16 MHz oscillator input)
_PLLDIV_5_1L EQU H'FC' ; Divide by 5 (20 MHz oscillator input)
_PLLDIV_6_1L EQU H'FD' ; Divide by 6 (24 MHz oscillator input)
_PLLDIV_10_1L EQU H'FE' ; Divide by 10 (40 MHz oscillator input)
_PLLDIV_12_1L EQU H'FF' ; Divide by 12 (48 MHz oscillator input)


;----- CONFIG1H Options --------------------------------------------------
_FOSC_XT_XT_1H EQU H'F0' ; XT oscillator (XT)
_FOSC_XTPLL_XT_1H EQU H'F2' ; XT oscillator, PLL enabled (XTPLL)
_FOSC_ECIO_EC_1H EQU H'F4' ; EC oscillator, port function on RA6 (ECIO)
_FOSC_EC_EC_1H EQU H'F5' ; EC oscillator, CLKO function on RA6 (EC)
_FOSC_ECPLLIO_EC_1H EQU H'F6' ; EC oscillator, PLL enabled, port function on RA6 (ECPIO)
_FOSC_ECPLL_EC_1H EQU H'F7' ; EC oscillator, PLL enabled, CLKO function on RA6 (ECPLL)
_FOSC_INTOSCIO_EC_1H EQU H'F8' ; Internal oscillator, port function on RA6, EC used by USB (INTIO)
_FOSC_INTOSC_EC_1H EQU H'F9' ; Internal oscillator, CLKO function on RA6, EC used by USB (INTCKO)
_FOSC_INTOSC_XT_1H EQU H'FA' ; Internal oscillator, XT used by USB (INTXT)
_FOSC_INTOSC_HS_1H EQU H'FB' ; Internal oscillator, HS oscillator used by USB (INTHS)
_FOSC_HS_1H EQU H'FC' ; HS oscillator (HS)
_FOSC_HSPLL_HS_1H EQU H'FE' ; HS oscillator, PLL enabled (HSPLL)

 

[bliscar]

Hi wp100,
thanks for the reply...but I didn't get your above instructions for the solution to my problem.
Here I would elaborate a bit more what is the problem, then u might help it accordingly:-

Here is a piece of code I've written in MPLAB X for C18 compiler:-

#include <stdio.h>
#include <stdlib.h>
#include <p18f4550.h>
#include <delays.h>

#pragma config FOSC = HSPLL_HS // 20MHz external crystal with PLL enabled
#pragma config PLLDIV = 5 // Divide by 5 to provide the 96MHz PLL with 4MHz input
#pragma config CPUDIV = OSC1_PLL2 // Divide 96MHz PLL output by 6 to get 16MHz system clock
#pragma config USBDIV = 2 // USB Clock comes from 96MHz PLL output/2


int i;
int j;
int k;

void main(void)
{


TRISD = 0x00;
PORTD=0x55;
for(k = 0; k < 5; k++)
{
for(i = 0; i < 5; i++)
{
for(j = 0; j < 1; j++ )
{
Delay10KTCYx(255);
}
PORTD = 0x55;
for (j = 0; j < 1; j++ )
{
Delay10KTCYx(255);
}
PORTD = ~PORTD;
}
for(i = 0; i < 5; i++)
{
for(j = 0; j < 1; j++ )
{
Delay10KTCYx(255);
}
PORTD = 0xFF;
for (j = 0; j < 1; j++ )
{
Delay10KTCYx(255);
}
PORTD = ~PORTD;
}
}
}

and it is working pretty fine(as it is a pretty standard for loop) in my PIC18f4550.

and in this code I have set #pragma config PLLDIV = 5 through the preprocessor as i knew that I was working with 20MHz external crystal oscillator. But I want to create a function in which programmer will set the value of oscillator as an argument and PLLDIV value will be set accordingly(not through the preprocessor and I don't want to use the last three #pragma config statements) -
e.g. setPLLDIV(int osc)
{
if (osc = 20)
PLLDIV = 5;
elseif(osc = 16)
PLLDIV = 4;
......
...... //and so on.
}

and in the similar fashion I want to set the CPUDIV0 and CPUDIV1 (4-3 bits of CONFIG1L) bits also. and it's obvious that solution of the above problem will lead to this problem's solution also.

another thing I want to ask is that is there any way to check the value of these registers (beyond 300000h) e.g. CONFIG1L , CONFIG1H, etc. in the simulator as we check of TRISB, PORTB and other SFRs and program memory in MPLAB SIM v8.84 or MPLABX Simulator.

and regarding the statements which you posted in your comment...I don't know ...where to use it...hope u get it that what is the problem and suggest some solution...

 

[wp100]

Hi wp100,
thanks for the reply...but I didn't get your above instructions for the solution to my problem.

Hi,


Just thought that if you had not set FOSC to PLL then PLLDIV would be invalid.


Afraid I cannot help with the C code , sure others will come in and explain things for you.

 

[bliscar]

let's c...who has the answer...by the way I got the way to check the configuration bits while simulation...it was just there ...but still the main problem of table read and write persists...