a problem about a^2 in VHDL

[Ye2x]

Hi,

i got a problem
can we do a^2 without doing a*a or a+a+a+...+a?
if we can, how about the coding?

thanks

 

[TrickyDicky]

whats wrong with a*a?

 

[verylsi]

Simply put two ** before the exponentials.

for 2^3 write 2**3 to get 8.

 

[Ye2x]

i'm looking for a tricky way to solve that

it's like when you need to multiply by two, such as 3*2, you can use a shift register to make it
is there a tricky way like that to do the a^2?

---------- Post added at 14:48 ---------- Previous post was at 14:46 ----------

@verylsi

if i want to do a^2, for any value of a
can i do 2**2 to get 4 and 25**2 to get 625?

also, do it work for binary?

 

[TrickyDicky]

a**2 is the same as a*a. You need a multiplier. You cannot avoid it. writing a*a in code will instantiate a multiplier for you, whether its a hard multipler or a logic one.

Unless you're trying to build a multiplier yourself?

there is no other way to do it.

 

[manojkhandelwal]

Hi,

Here is a way which i saw somewhere
00001 + 0 = 00010 (2)
00010 + 2 (0+2) = 00100 (4)
00010 + 6 (2+4) = 01001 (9)
00100 + 12 (4+8) = 10000 (16)
00101 + 20 (8+16) = 11001 (25) ...........

Iam not saying that this can be efficiently be implemented in digital logic........(may be let the experts comment on this).......but just saw it somewhere (long back) dont remember now

Thanks,
Manoj

 

[Ye2x]

so a**2 = a*a?
i see, sorry, i'm still newbie on VHDL, so i'm still learning

so basically to get a^2 i 'must' use a multiplier and there no other way to do it right?
to get the result, i've tried to use the wallace method from my senior, the result is ok, but need to improve the delay

---------- Post added at 15:46 ---------- Previous post was at 15:45 ----------

@manojkhandelwal

for the 5^2
is 00101 + 20 (4+16)?
if so, the formula for 6^2 is not right i think...

 

[manojkhandelwal]

hi,
sorry i messed it up!!!

look at this now

1 + 0 =1
2 + (0+2) = 4
3 + (0+2+4) = 9
4 + (0+2+4+6) = 16
5 + (0+2+4+6+8) = 25
6 + (0+2+4+6+8+10) = 36
7 + (0+2+4+6+8+10+12) = 49
now its perfectly fine!!!

Thanks,
Manoj

 

[Ye2x]

i see, so it also can be translated that way
thanks Manoj

but if i implement it into a program and try to manifest the hardware, will it make delay bigger when the value is getting bigger?

 

[manojkhandelwal]

Hi,
yeah! you are right ....but multiplication of higher widths (a*a) will also have larger delays (multiplier delays also depend on the widths as far as i know).
But again iam not sure .........may be multiplication is the only best way, because all FPGA tools will synthesize it into a multiplier.

Thanks,
Manoj

 

[Ye2x]

ok. Thank you guys.

will the you again if i got the solution.