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50 - 70 GHz VCO in IBM 0.13um cmrf8sf process

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CZa

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Hello everyone,

I'm trying to design a VCO in the 50 - 70 GHz range using the IBM 0.13um cmrf8sf and I've got several questions:

- The transition frequency for the transistors in this process is about 90 GHz. Do you think they will present enough gain at the band of interest?

- Although I'm more used to single transistor topologies, I've seen that most CMOS VCOs are implemented using a cross coupled topology. Why is this topology advantageous with regard to the single transistor topology?

- For the capacitance ranges of the varactors available in this process, about 4 - 16 pF, I would need a very low inductance value, around 1 pH, which is too low for spiral implementations. I've tried to use a shorted stub instead, but apparently the stubs in the process cannot be shorter than 100um, which shields a minimum inductance of about 75 pH. What can I do about it?

I will be very grateful if you could answer any of these questions or provide any advice.

Thank you very much in advance,

CZa
 

Question...
Is that process suitable for 50-70GHz applications ??? Has somebody suggested to use this process for that band or is it you who has selected by yourself ??
 

Question...
Is that process suitable for 50-70GHz applications ??? Has somebody suggested to use this process for that band or is it you who has selected by yourself ??

First of all, thank you very much for your answer. This is actually very closely related to my first question. I'm supposed to use this process because it's the one we've got available. However, due to the relatively low transition frequency of the transistors, I'm afraid it may not be suitable for this frequency band. What do you think? Could you suggest any alternative processes?

Could anyone suggest (or ideally post) a book on basic monolithic oscillator design? I've got some experience in oscillator design at lower frequencies in hybrid technology. This is my first attempt at integrated design and I could really use some basic guidelines to set it in motion.

Thank you again.

Regards,

CZa
 

First of all, thank you very much for your answer. This is actually very closely related to my first question. I'm supposed to use this process because it's the one we've got available. However, due to the relatively low transition frequency of the transistors, I'm afraid it may not be suitable for this frequency band. What do you think? Could you suggest any alternative processes?

Could anyone suggest (or ideally post) a book on basic monolithic oscillator design? I've got some experience in oscillator design at lower frequencies in hybrid technology. This is my first attempt at integrated design and I could really use some basic guidelines to set it in motion.

Thank you again.

Regards,

CZa

Except some academic tryouts, compound semiconductor devices such as GaAs GaN etc. and derivatives are used at those frequencies tu build up VCOs, LNAs etc.
due to higher dielectric coefficient of the compound substrates and higher mobility feature.Also, MMIC is preferable design and layout technique for those frequencies.
I think you should consider MMIC processes from Triquint, WIN, GCS (especially for very low noise VCOs), IPH etc.
 

Except some academic tryouts, compound semiconductor devices such as GaAs GaN etc. and derivatives are used at those frequencies tu build up VCOs, LNAs etc.

Not quite true. The "academic tryouts" have reached frequencies at > 200GHz now, targeting 500 GHz.
**broken link removed**

SiGe BiCMOS technologies such as TowerJazz SBC18H3 (SiGe ft 240GHz) or Infineon B7HF200 (SiGe ft 200 GHz) have become an industry standard for frequencies in the 50-80 GHZ range. Other companies have similar offerings. One common application are 77 GHz automative radars. I also see many former GaAs users switch over to SiGe for new mm-wave projects.

I cant't comment on the IBM 0.13um cmrf8sf.
 
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Thank you very much for your comments. What do you think about Ommic D007IH?

Can you suggest any book on integrated oscillator design at this frequency?
 

This is a good book showing most important approaches and issues that appear when working at 60 GHz (not only PLL's).

https://www.springer.com/engineering/circuits+&+systems/book/978-90-481-9279-3

Need a lot of experience to design quality products at these high frequencies. Unfortunately I met people with almost no RF background jumping directly to design circuits at 60 GHz, when their previous experience was designing OpAmps.
 

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