2-3 ghz schmitt trigger?

[kurtulmehtap]

Dear All,
I've found several logic gates (AND,XOR) accepting >3 Ghz input frequency, However I am not sure if there are Schmitt triggers supporting >2 Ghz input frequency. The only parameter I've found in datasheets is Propagation delay in nsec.
Please help.

 

[FvM]

You should translate to schmitt trigger to "comparator with hysteresys". Look e.g. at Analog Devices ADCMP572/ADCMP573

 

[biff44]

here is a 1 ghz one:
http://www.potatosemi.com/potatosemiweb/datasheet/PO74G14A.pdf

 

[D.A.(Tony)Stewart]

There are a lot of solutions in the 3GHz range. One simply applies positive feedback on differential outputs to differential inputs for hysteresis.

They all tend to use current mode differential logic. Some are simply called CML.
It started with ECL using negative supplies in the early 70's.

then along came Positive/pseudo emitter-coupled logic (PECL) is used in point-to-point, high-speed, differential-data transfer applications.

The opposite of ECL, PECL has a positive power supply scheme with VCC = 5 V and VEE = 0 V. PECL is typically used across a 50-Ω transmission medium using a 50-Ω to VCC-2-V termination. Typical output voltage swings for PECL are 800-mV peak or 1600-mV peak-to-peak allowing for greater transmission distances, whereas the output common mode is typically VCC – 1.3 V.

Then came high speed serial ports for LCD and other interfaces called LVDS interfaces.

details
https://www.ti.com/lsds/ti/interface/lvds-m-lvds-ecl-cml-technical-documents.page

TI has these offerings, with many other compatible sources.

Industry Standards for Various LVDS Technologies
Industry standards bodies define LVDS and M-LVDS technologies in specifications ANSI/TIA/EIA-644A and ANSI/TIA/EIA-899, respectively. Some vendor datasheets claim LVDS I/Os (or pseudo-LVDS) but in fact may not meet the required common-mode or some other important parameter. Therefore, compliance to the LVDS specification TIA/EIA-644A is an important consideration.

Current-Mode Logic (CML) and Low-Voltage Positive-Emitter-Coupled Logic (LVPECL) are widely used terms throughout the industry, although neither technology conforms to any standard controlled by an official standards organization.

Implementations and device specifications will therefore often vary between vendors. AC coupling is used extensively which
helps resolve threshold differences that might otherwise cause compatibility issues.

Note that all of the technologies listed are differential and thus share the advantages common to differential signaling such as excellent noise immunity and low device-generated switching noise.

Family . . Ind. Std . . Max.Rate . . Out Swing (VOD) . . Power
LVDS . . . . TIA/EIA-644 . . . . 3.125 Gbps . . . . ± 350 mV . . . . Low
LVPECL . . . . . . N/A . . . . . . 10+ Gbps . . . . ± 800 mV . . . . Medium to High
CML . . . . . . . . N/A . . . . . . 10+ Gbps . . . . ± 800 mV . . . . Medium