Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

help in asynchronous processor in vhdl!

Status
Not open for further replies.
J

jody

Member level 3
Joined
Sep 14, 2006
Messages
57
Helped
7
Reputation
14
Reaction score
1
Trophy points
1,288
Activity points
1,527
Did somebody already make an asynchronous processor in vhdl that could help my to begin a project? its possible?
 

Hi.

Basically FPGA is made for synchronous operations. But its possible to prototype some of the asynchronous handshaking in FPGA. There are a lot of tools available for asynchronous designs.

The attached doc may help you.

Hope it helps

Thanks
 

    J

    jody

    Points: 2
    Helpful Answer Positive Rating
Hi Friend,

Please i have a question for you:
How to design an asynchronous counter ?

Any way,
Here a FTP link where 2 nice books on asynchronous circuits design. Asynchronous processor is deeply detailed inside.

**broken link removed**

Dont forget to push the helped me button.
Thanks.
 

I found only a book that already had of the myers I have more two that are: asynchronous presses logic, and asynchrous design by jens sparso, thx

Added after 4 minutes:

how is this asynchronous counter ?
 

Hi,
have a look at the "ASPIDA" project. It was about the implementation of an
asynchronous DLX processor using commercial EDA tools. It was implemented
for both ASIC and FPGA flows.

Pavlos
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top