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Recent content by zel

  1. zel

    Plz help me to link these modules in verilog

    If it just how to connect between 3 modules, then.. you can create another module as a top module and connect all your modules(counter, pid etc...) inside this top module as what you said
  2. zel

    Mario game

    you need a state machine..
  3. zel

    full subtractor using case statement...plzz tell me error

    a lot of latches.
  4. zel

    The dead of hardware!

    Hi guys.. I want to ask your opinion in this. Nowadays, we can see a lot of stuff is being focusing in software and apps.. Is it possible that the need of electronic hardware engineer will decrease because of this?
  5. zel

    Which company do you work? Where?

    hi avenger.. Im not really sure.. by the way, do you familiar with fpga? if yes do PM me.. I am really looking for verilog/vhdl programmer.
  6. zel

    Design RAM using verilog with port given only

    hm.. this is quite new for me too.. what i know from the names, ramaddr is address. ramin is a data. cs is chipselect. rwbar is read/write bar. opr is operation and ramout is data out..
  7. zel

    How to reduce FPGA kit clock speed?

    Re: To delay clock speed https://www.xilinx.com/support/documentation/ip_documentation/dcm_module.pdf
  8. zel

    Verilog HDL standard coding practices

    always @(posedge clk) begin if (en) raddr <= addr; end in above example; means if the en is asserted, raddr is addr at rising edge of the clk. if the en is not asserted, then raddr is equal to previous value of raddr.
  9. zel

    Looking for freelance fpga project

    i PM you..
  10. zel

    altera cyclone IV pin assignment problem

    FvM, i got what u mean and yes i think i dont define necessary output enable group for the signals. so i output enable group all ddr2 signals and the problem solve. j_andr, i cant find the device and pin option -> pin placement -> max. output
  11. zel

    altera cyclone IV pin assignment problem

    hi guys, I assign pin assignment for Altera FPGA Cyclone IV then this Error Message occur: Error: Cannot place pin ovMemBa[0] to location B3 Error: Can't place VREF pin B5 (VREFGROUP_B8_N1) for pin ovMemBa[0] of type output with SSTL-18 Class I I/O standard at location B3 Error: Too...
  12. zel

    What is the qualification to be a Sales Engineer in Malaysia?

    ops.. if you're asking about the qualification to be sales engineer, then you need experience..
  13. zel

    What is the qualification to be a Sales Engineer in Malaysia?

    nothing much happen in Malaysia especially in electronic sector. electronics engineers here always play with protocols and spec; designing Protocol Analyzer, designing IP, maintaining machine and production lines. and some of them handle sales of company's product... and sometimes they do...
  14. zel

    Need software for vhdl coding

    i suggest Notepad ++ for better view. Altera Quartus and Xilink ISE for Hardware coding.
  15. zel

    Electronic Hardware Design Engineer and Software Engineer.

    Hi everyone, I'm looking for Hardware Design Engineer and Software Engineer, and willing to work at Kuala Lumpur, Malaysia. If interested may mail me with your profile to zel_firdhaus@yahoo.com
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