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Recent content by vnramkrishnan

  1. V

    Need help in sentaurus tcad, soi tfet simulation

    use Enormal(Lombardi)
  2. V

    Sentaurus device (SYNOPSYS TCAD)

    you can add material in silicon.par file
  3. V

    gate all around device channel meshing

    can anyone tel me how to do fine meshing of the channel in a cylindrical gate (GAA device). telme the code using window or multibox method in sentaurus synopsys tcad
  4. V

    SEU current pulse model in TSPICE

    Does anyone knows how to model Single Event Upset(SEU) current pulse in TSPICE. thanks
  5. V

    [MOVED]two and four wheeler parking management solution

    hi all, does any one done microprocessor or micro controller based bike and car parking management solution using sensors. the availability should be displayed at different entrances. does any ready-made prototype available? give me the details. thanks
  6. V

    SPICE3F5 installation procedure

    dear all, can anyone telme the spicef5 installation on linux thanks
  7. V

    Predictive technology model

    sir/madam, 1.can anyone telme how to write the netlist correct for 6T FinFET SRAM inverter. 2.i have a predictive technology model (PTM) file from Predictive Technology Model (PTM) for 32nm BSIM4 model card for bulk CMOS: V0.0 and 45nm sub-circuit model for FinFET (double-gate)...
  8. V

    can anyone tel me what is Artisan model in CMOS SRAM

    what is artisan model in CMOS SRAM
  9. V

    4T SRAM resistance value

    hi, what is the typical 4T SRAM load resistance value connected to NMOS1 and NMOS2 drain tnx
  10. V

    NMOS vs PMOS leakage current

    why PMOS leakage current(Ioff) is more than NMOS. Plz specify reason other than mobility ratio.
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