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Recent content by vijayR15

  1. V

    problem when adding stripe

    Hai scscs, Try with the below script it will draw four stripes.. addStripe -block_ring_top_layer_limit M7 -max_same_layer_jog_length 6 -padcore_ring_bottom_layer_limit M5 -set_to_set_distance 30 -stacked_via_top_layer AP -padcore_ring_top_layer_limit M7 -spacing 2 -xleft_offset 25...
  2. V

    Dump data into file using SKILL

    Hi varun, csv is simple. just open a text file in linux machine. type the below words and save as excel.csv "vijay","raj","99" "selva","kumar","100" Then double click it will be open in excel with columns and rows. This is due to "" and , seperators. o/p vijay raj 99 selva kumar 100...
  3. V

    Dump data into file using SKILL

    Hi varun, If i understand some basic needs of ur requirement i can help u more.. why u need this XML format optionally if u want in excel there are more easy way to do this. (i.e using .csv) I use to get information from layout and schematic and i will use .csv format so that i can open in...
  4. V

    Dump data into file using SKILL

    hi varun, Its great.. so far i haven't found any syntax that dump XML for schematic...... but using fprintf we can dump based on our needs as we did.. Did u need example for procedure to dump to file??
  5. V

    Dump data into file using SKILL

    Hi varun, yes,, we can dump into files using skill code.. there are some skill tool commands which is used to get information from schematic . Then store that information into a file. If you want store that code into a procedure.. use file concept.
  6. V

    [SOLVED] [PERL] How to pass "+" character to perl?

    Hi maulin sheth, For ur requirement Is there any possibity to send with "" while passing. If u can then its easier use the below code. perl try2.pl -ComndOpts="+vcs -full64" use Getopt::Long; GetOptions("ComndOpts:s" => \$ComndOpts); print $ComndOpts;
  7. V

    while fixing the setup violation for one path, other paths gets affected

    Hi ramesh, u can upsize or downsize the high fanout cell. but keep this as a last priority to use. The key point is consider if it has 2 fanout it will have effect in 2 paths. If it has more paths it will have impact on more path. yes u r right with reg2reg violation but in some case there...
  8. V

    while fixing the setup violation for one path, other paths gets affected

    Hi ramesh, The reason is there will be cells present in both paths so that its violation. we can easily pick that cells by fanout if the fanout is high it will affect other paths too.. So upsize or downsize the cells which is independent to that path. Also look the path is from which clock to...
  9. V

    [SOLVED] [PERL] How to pass "+" character to perl?

    Hi maulin sheth, Have you tried with ARGV command. This will retrive the command line value printf "$ARGV[0]\n"; printf "$ARGV[1]\n"; If u add the above command in temp.pl it will print -ComndOpts=+vcs and -full64. $ARGV[0] will have -ComndOpts=+vcs $ARGV[1] will have -full64.
  10. V

    PLS CAN ANY1 GUIDE IN Tcl

    Post your queries we can help you..
  11. V

    set_max_delay vs. set_input/output_delay

    Maximum delays will always have the source or destination as a register we can also set from port to port. Mostly we will represent this by -from and -to . In the sense reg to out, in to reg and also from port -to port etc.., ex:- set_max_delay 10.0 -from [get_pins...
  12. V

    height of the standard cell in 40 nm and 90 nm technologies

    Hi Satheeth Kumar, I worked on TSMC 40 nm it has standard cell height of 1.26 u and in 90nm i worked on CMOS90 which has standard cell height of 2.52 u. This is for single standard cell for double height standard cells it doubles.
  13. V

    Tcl...didnt get output

    Hai manchal, The reason is the below for statement for {} {$i<$len} {incr i} { Its due to the value of i and len . First iteration the i value is 0 and len value is 1 so it enter into the loop . In second iteration ivalue is 1 and len value is also 1 so its not entering into it while...
  14. V

    [SOLVED] Area of Block estimation

    After placement it should be apporimately 70% . using checkPlace command u can see that percent.. Based on this we can estimate. And ater full flow based on routing and placement congestion, we can increase or decrease the block size.
  15. V

    Timing-aware Place&Route using SoC encounter

    Timing related constraints in pnr(encounter) will be on sdc. u can also add in encounter terminal window. Below is an example ex:-set_max_delay 0.2 -from [get_ports {dln_tx_UlpsActiveNot[3]}] -to [get_ports {bist_seed[3]}]
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