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Please check that your simulator options.
If you have gear2 (or gear), then you will not get any oscillations since this option tries to suppress the oscillatory behavior of the circuits.
you have to use option like trap.
Re: Is there any rule for no. of contacts in case of MOS cap
If you put more number of contacts then the cap value can change. ( This is seen
in the 65nm & 45nm technology, where the oxide thickness is few molecules thick)
I was able to stability analysis using ac analysis.
I toolk the negative gain loop and observed the Phase margin for the o/p.
But I still have a queation, like what about the +ve loop, as what to look for. since stability wise that loop is unstable (as standalone).
Since I am using opamp fr the bandgap circuit. I have one question reagrind the Feedback. Since the Circuit contains two feedbacks (one +ve & one -ve) so do I have to analyze these two loops seperately or in combination.
What I mean to say that, can not analyze two loops simulteanously or I...
LVDS design below 1.8V
Can some body give me some docs/stuff related to LVDS designing for 1.8V.
I searched on the net, I got IEEE SCI stuff, but that is very general and does not talk about any particular supply voltage levels.
I tried to cut the loop & simulated for ac analysis. Now I am wondering, how much phase margin I should choose. ?
Does the gain Margin here is of any significance. If yes, What is the impact of reducing/increasing the gain margin ?
How can I know that where the poles are located. I need to find the transfer function.so that I can do some mathematical analysis before jumping to the CAD simulation. can anybody direct me to some stuff which will be relevant for such a nalysis. Regarding my background, I am an IO design...
I am analysing a bandgap circuit. Can some body give me some help regarding:
1) How to find the Transfer function.
2) How to check about the stability & compensation.
Basically I want to know how different transistor/capacitors contribute to poles & zero.
If some body can point me to some doc...
Re: ESD TOOLS
Do you want to run the ESD simulations. I mean HBM or MM ?
if yes then you can use HBM & MM models (which contains only simple R, C & L). Give the conditions & you can simulate.
But if your ESD protection circuit is not simulatable, then you can not simulate it.
Re: SiC (Silicon Carbide). Is this process technologies futu
Thanks God. I thought that the SILICON Industry will die by 2010. Now we have some more Time. Lets wait & see how feasible is this SiC. Because if these crystal growth is not feasible from cost point of view then it is useless.
Is it that simple.
I tried to use this concept to drive the dpendence of L on the hot carrier effect. I found that the final velocity with which electron reaches drain is independent of channel length.
Please find the derivation below:
E = Vds/L (electric field lateral)
F = e E...
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