Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by manoranjan sb

  1. M

    write output of the program in text file

    hi i want to write the output of my verilog program to a text file. the output of my program is 1024 values and each value is a binary string (ex. 10101101). how can i write it to the text file? i used $readmemb for reading the values from the text file. can anyone send the code for this...
  2. M

    ipcoregen in spartan 3e fpga

    i dont know how to write the output result of my program which are binary values in the bram. for taking inputs i used coregen wizard. but for storing outputs, is there any technique available. can you write any example for this. pls
  3. M

    ipcoregen in spartan 3e fpga

    hi i want to store the output of my verilog program in a bram. how can i use the bram for storing output. for giving inputs i used bram using ipcoregen wizard. pls help for storing output.
  4. M

    how to write and read file file in vhdl

    hai i want to read the pixel values of two images and perform correlation between the pixels using vhdl. firstly i got the pixel values of the images and stored the values in two text files. now i want to read values from the text files, perform cross correlation and want to...
  5. M

    using dpram in spartan and virtex fpgas

    Hi can anyone suggest how to call dpram (in which some data is stored) in verilog / vhdl? I am using dpram for storing image pixel values. I need to retrieve the data in a particular sequence.
  6. M

    matlab to vhdl file conversion

    Is it possible to convert all the matlab files to vhdl/verilog file using any inbuilt functions in matlab??
  7. M

    suggestion for my vlsi+dip project

    Is it possible to convert all the matlab files to vhdl/verilog file using any inbuilt functions in matlab??
  8. M

    suggestion for my vlsi+dip project

    Which coding would be better for the my project? I have got trained already with verilog. whether i can follow verilog or vhdl for implementation.
  9. M

    suggestion for my vlsi+dip project

    I am a final year electronics and communication engineering student. My project title is 'A VLSI architecture for image registration' an IEEE 2007 paper. Can anyone please suggest me how to design the various blocks in that architecture. If anyone wants I am ready to send the softcopy of that paper.
  10. M

    suggestion for my vlsi+dip project

    Hi I am undertaking a project named "A VLSI architecture for image registration" an IEEE 2007 paper. Please suggest me some ideas to design the hardwares involved in that paper such as Address and control signal generator unit, Data fixer unit, window processor.
  11. M

    vlsi architecture for image registration

    Hi I have planned to do a project named "vlsi architecture for image registration". Is it feasible to do? How to proceed initially? Do I need to start with matlab programming initially and want to make a conversion from matlab to verilog? Please suggest.From Manoranjan
See more

Part and Inventory Search

Back
Top