Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi,
I got a very basic question, could someone help me to make sure the answer?
I have checked some useful textbooks(EX:razavi), however, I still feel not enough.
1. what is the difinition for "small signal"
2. What is the benefit for using the small signal analysis? Is there any condition...
calculating noise contribution
Hi,
I have a question about the noise contribution in the following LNA:
Ls has a parasitic resistor:rs
M1 or Ls(rs), which one contribution more noise?
In me opinion, if Ls is large, and thus, the rs is large, the noise contribution in Ls is bigger than M1...
Hi,
I got a question~
Why Power gain is more important than Voltage gain in RF Circuit?
What is the reason make power the natural quantity in RF circuit and system?
Thanks!
Hi,
I am calculating the steepest slope for the output time response of the the two-stage open-loop comparator. From the book (Allen, P.448, Eq.8.2-13), it says I need to find it by differentiating the equation of time response twice and setting the result the result = 0. Why???
I know the...
Re: Bode plot
I am using HSPICE to simulate the two stage op-amp as shown in the attachment.
So, it is caused from the HSPICE which limited the phase in +- 180 degree?
Thanks!
Thanks! zhaoqin~
1.
So, with your method, if I change the Vin until Vout=0.9v when Vin=0.91v, Vos=0.01v. Is it correct?
2.
So, similarly, if the Vdd is 5V and Vss=-5, with your method, I need to change the Vin until the Vo=0v, then if the Vin=0.12mv, Vos=0.12mV. Is it correct?
3.
Conclusion...
Hi,
From the attachment, why the red line (the phase) go to 180 degree form -180 degree suddenly? Is it because the zaro or some other reasons?
Thanks!:D
Hi,
This is an two-stage opamp with miller compasation cap and Vdd=1.8v, Vss=0v.
I am measureing the input referred offset voltage (Vos) for this op-amp.
I bias DC=0.9v for both Vin+ and Vin- and AC=1 for the Vin+. Then, when Vin=0.9v, the Vout=0.912v, where both vout and vin are in the...
Hi,
I have a question when design a two-stage op-amp (include miller cap and Rz)
I am improving the Gain Bandwidth product(GBWP).
If the Power(DC) for the circuit is 883uW, and the Vdd=1.8v, the Load is CL=0.3p,
What is the maximum GBWP I can get? Is there anyway to know the maximum?
Thanks...
Hi,
I am using HSPICE to simulate the bandgap.
How can I measure the TC (Temperature Coefficient) in the Vref ?
What's the code I need to use to measure?
Thanks!
Wang
a question about HSPICE
When I simulate LNA, I met the following message in the output file:
lic: No 'set LM_LICENSE_FILE' in current environment'
I have correct the path of the license and changed the environment variable.
Other than this, everything is good. I can still run the frequency...
Hi, I got some questions about the bandgap reference:
1. what is gm-based reference? Is it constant-gm biasing?
2. In the fig.1, why the output of the op-amp (node P) can adjust the gate voltage of the PMOS devices so as to "Equalize" Vx = Vy?
3. Also in the fig.1, what will happen if I change...
Hi,
I just finished the study in op-amps design from Razavi's book.
However, I feel not enough in some topics like CMFB, slew rate and some other practical issues.
Could you recommend me any other books like Allen or Meyer so that I can study further?
Thanks a lot!
Wang
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.