Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

question about bandgap reference

Status
Not open for further replies.

joehwang

Junior Member level 2
Junior Member level 2
Joined
Mar 23, 2007
Messages
23
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,454
Hi, I got some questions about the bandgap reference:

1. what is gm-based reference? Is it constant-gm biasing?
2. In the fig.1, why the output of the op-amp (node P) can adjust the gate voltage of the PMOS devices so as to "Equalize" Vx = Vy?
3. Also in the fig.1, what will happen if I change the input polarity of the op-amp? Does the polarity matter with the stable issue?

Thanks!

Wang
 

hi,
i just want to say that when i designed a bandgap, if i connecte the ampli output to the pmos gates, i could not have a good stability. I connected the pmos gates to a startup circuit
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top