Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
PSRR is the value of the power rejection refered back to the input.
For the regular, it doesn't really have input signal, so PSR is measured.
For the Opamp, there is an input, so ...
calc.pdf cadence
I was trying to using Cadence Calculator to calculate the Total Harmonic Distortion (THD). I got the result something like "0.012m". Can somebody tell me whether it is in Percentage or not? In other words, the THD is 1.2% or 0.0012%:?: Thank you in advance:!:
tsmc018um
In this ADS Design Kit,
there is a file: mm018_dk.net. In this file
There are 12 different models for the same device:
model TSMC_CM018RF_BB_MODEL_nch BinModel
Model[1] ="TSMC_CM018RF_BB_MODEL_nchx1"
Model[2]="TSMC_CM018RF_BB_MODEL_nchx2"
Model[3]="TSMC_CM018RF_BB_MODEL_nchx3"...
Re: ADS designkit
In this ADS Design Kit, there is a file: mm018_dk.net. In this file
There are 12 different models for the same device:
model TSMC_CM018RF_BB_MODEL_nch BinModel
Model[1] ="TSMC_CM018RF_BB_MODEL_nchx1"
Model[2]="TSMC_CM018RF_BB_MODEL_nchx2"...
Re: Please explain difference between these two 2stag op-amp
The 2nd stages of both opamp are Common Source (CS) stages. The could be NMOS or PMOS CS stage. So both will work.
After I done the LVS, I was told
4 net-list ambiguities were resolved by random selection.
And I was also told:
The net-list match.
Can somebody tell me what's going on there? How can I fix it? Do I have to fixed before send it out? If I send the layout to fabrication, will the circuit work...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.