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Recent content by doibongvui

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    how to setup vcontrol vs vco frequency in hspice

    Hi I am doing a VCO (part of PLL) design and I dont know how to setup vcontrol vs vco frequency in hspice. I really need help from anyone and appreciate your help. Thank you very much
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    high speed sense amplifier

    Hi all My friend works as flash memory design engineer. He is always talking about high speed sense amplifier. From my understand sense amplifier works like comparator to compare reference voltage with voltage from memory cell and will give output 1 or 0 depend on data program in the cell. The...
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    [need help]Tsmc018 model

    Hi sabjt I have tsmc 0.18um with TT, SS, FF, SF, FS 3v, 1.8v, 3.3v. I downloaded it from internet about 4 months ago. I have hspice file setup for that model so it is easy for you doing project. Do you need it? I dont know I can send you here because file is big.
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    zeroes in folded cascode opamp

    Re: folded cascode opamp Hi Can you make your picture more clear? I can not read which transistor is M6 and sizes of them. Thanks Why you dont use real bias circuitry instead of plug in some number?
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    How to Design a two-stage high-speed op-Amp using equations?

    Re: How to Design a two-stage high-speed op-Amp using equati Hi In my opinion, you should start from the gain spec. Your gain is >=70db. let say gain is 80db = 10000 Gain = Gain1* Gain2 Gain1= gm2*Rout1,2 = gm2*ro1*ro2/(ro1 + ro2) = gm2/Id2 *[ VA1*VA2/(VA1 + VA2)] Gain2= gm6*Rout6,7 =...
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    [SOLVED] transconductance (u*Cox) parameter dependency to technology

    Re: transconductance (u*Cox) parameter dependency to technol Hi Please read this topic , people in this forum discuss a lot about uCox. Thanks
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    CMOS Amplifier (Class A)

    Hi 1/To figure out VGS2 you need to know your spec like power dissipation and from this you will know the current ===> VGS2 with W/L to be chosen 2/ You should know gain of this amp from spec ===> I (current) > bias
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    [50 pts] Delay Calculation

    The delay (best case or worse case) depends on A or B input switch. I attached the link shows you not only know how to calculate delay of nand/nor/inverter but also teach you how to do good sizing transistor in design **broken link removed** Good luck
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    OpAmp design by Allen&Holberg Approach

    Hi Jennisjose I m living in san jose, CA too. What company are you working?
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    help me about counter by ic counter

    Hi Do you want to design digital counter? Your counter counts from 0000 to 9999 you can use shifter to shift left/right for count up/down.
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    Again about Common Mode Input Range

    Hi It is difficult to read your picture. Can you show us your schematic? We can analyze from it. Thanks
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    Output stage for op-amp without loading effect

    Re: Output stage for op-amp When running simulation did you include any loading? I suspect output current is small. BTW: your bias circuit (the one on far left) look not good to me
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    Help to plot gm/id vs id/W

    Hi I need some one help me how to plot gm/id vs id/W. I include my spice deck if someone see any error please correct it $ gm/id vs inom plots .lib "C:\synopsys\Hspice_A-2007.09\test\spice_model.lib" TT .options post nomod .param w1=1u ibias vdd d dc 0 vvdd vdd 0 dc 3v mn1 d d 0 0 nmos W=w1...
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    some question on my VCO tuning curve!!!

    Hi From my understanding we can analyse the curve f vs vin. We know f(frequency) = 1/2*pi*Rout*Cm Note: Rout is output impidence looking at either Vout+ or Vout- Cm is Miller capacitance at Vout+ or Vout- Rout = 1/gm(pmos) Cm = (1 + Av)Cgd(nmos) with Av is gain of...
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    install hspice 2007.09 in pc with windows vista is OS

    Hi I have installed synopsys hspice 2007.09 on my laptop running with windows vista. I try to run some simple sim but it shows lic: No 'set LM_LICENSE_FILE in current environment' I am not good at setting pc environment. Could some one show me step by step how to make hspice work on my...

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