OpAmp design by Allen&Holberg Approach

[EmbdASIC]

Sometimes, when i design an opamp i get absurd small values for my W/L, which means 'less than 1' values. Phillip Allen address this problem as

If the value detemined for W/L is less than one, then it should be increased to a value that minimzes the product of W and L.

If the my slew rate and Compensation Cap, does not allow to alter themselves more, what can be done to pursue this particular hand calculation method ?

 

[erikl]

Why not increase the positive CMR = Vin(max) ?

 

[EmbdASIC]

Thanks for the reply.
Two comments here:
1. I determined this particular transistor's size by gm, (which i have known through gm = GBW x Cc), but offcourse one can use the Vinm(max) to deterine also.

2. However Vin (max), is a fix maximum value determined by architecture (CMR): i dont truly understand that it would be appropriate to change it to get a better result. ? Well for me changing it doesnt help either !

 

[wandola]

i think it is reasonable to have w/l less than 1...

 

[erikl]

i think it is reasonable to have w/l less than 1...

Sure; but then I find the statement in the Allen&Holberg book "it (the W/L ratio) should be increased to a value that minimizes the product of W and L" a bit confusing.

This is only possible, if the original L > Lmin. Only in this case it is possible to increase the W/L ratio for a W/L < 1 (up to Wmin/Lmin=1, because usually Wmin ≥ Lmin) and minimize the W*L product (i.e. the gate area or capacitance) at the same time.

 

[jennisjose]

How does one get the equation of positive CMR?

 

[doibongvui]

Hi Jennisjose

I m living in san jose, CA too. What company are you working?

 

[EmbdASIC]

I think you can do a DC analysis by hand to get your input Common mode range !

 

[erikl]

How does one get the equation of positive CMR?

I think sqrt(I5/β1) is meant (as for the negative CMR limit).