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Recent content by Brittoo

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    Abstract view integrity

    Hi How can one verify if the abstract view generated is correct? Regards Brittoo
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    Basics of differential amplifier

    Hi In a single ended double output diff amp, one of the i/ps is grounded. Can somebody tell me how the Ic flows through the transistor when the base is at zero voltage? Regards Brittoo
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    WPE implications for S-oriented and D-oriented MOS devices

    Hi As per my understanding, the WPE implications are as follows: >> S-oriented devices(Source close to well edge): Vth increases >> D-oriented devices: Ids increases Is this understanding correct :?: Regards Brittoo
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    WPE implications for S-oriented and D-oriented devices

    Hi As per my understanding, the WPE implications are as follows: >> S-oriented devices(Source close to well edge): Vth increases >> D-oriented devices: Ids increases Is this understanding correct :?: Regards Brittoo
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    B Tech/MBA: Which one to choose???????

    Hi all I am a Diploma holder working in the VLSI field from the past 4 years. I want to continue higher education but am confused as to whether i should go for MBA/B Tech (either of them through distance education). Need your suggestions on this front. Regards Brittoo
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    How does the DNW make way for a separate substrate?

    Thanks a lot erikl. You`ve answered most of my questions :) -Brittoo
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    How does the DNW make way for a separate substrate?

    Hi I would like to know how the DNW being N-type makes way for the PW/RW. Can someone please provide more info on the fabrication details of the DNW. Regards Brittoo
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    MOS device theory related questions

    Hello erikl Thanks for the reply. Could you please upload any docs related to point #2? Regards Brittoo
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    MOS device theory related questions

    Hello all Here are some of my doubts: 1.Why does carrier mobility reduce with temperature for pmos/nmos? 2.Why do low Vt devices have high leakage? 3.Why does the voltage drop happen when the nmos is used to generate a logic "high"? 4. Why do series connected "n" number of nmos/ pmos...
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    Error while streaming in LEF file

    Hi all I get the following error while trying to stream in the LEF file: "Constraint minSpacing does not match the referenced technology database:Cannot modify a read-only technology database.Technology information was ignored" Anybody has any idea as to what needs to be done here...
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    Customized cell not recognized by Calibre LVS

    Hi I have a custom metal cap which is not from the foundry.LVS does not recognize this cap.Need some suggestions on fixing this issue. Regards Brittoo
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    Dummy resistor to be ignored in Calibre LVS run

    Hi Protonixs/Bellona Thanks for the suggestions. I do not have the liberty to delete the LVS mkr layers. The RC switch in Calibre was not working for me as well. Any other suggestions are welcome!! Regards Brittoo
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    Dummy resistor to be ignored in Calibre LVS run

    Hi I am unable to waive the dummy resistors during the Calibre LVS run(not accounted for in the sch) and end up having property mismatches. Any idea how this can be achieved using the Calibre settings? Regards Brittoo
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    SVN(subversion) related query

    Hi I am trying to setup svn for our project. While trying to embed the "lock-modify-unlock" feature, i found that lock/unlock commands are not found. Can somebody please let me know how to get these commands on svn? Regards Brittoo
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    Threshold vol. variation by implant addition to the channel

    Re: Threshold vol. variation by implant addition to the chan Hi erikl Thanks for your reply.Is there any paper/book that could give more information concerning this matter ? Regards Brittoo
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