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Recent content by Arnold

  1. A

    system verilog, specman or vera

    From the ESNUG survey, it should be SystemVerilog.
  2. A

    Writing testbench in verilog or e language?

    if you have an E expert in your team, you can choose E, otherwise, using others. E is too difficult to learn, especially there is no experienced engineer mentoring you.
  3. A

    ncverilog is faster than vcs?

    and you should compare these two with the latest version. I feel vcs is faster.
  4. A

    What tools can do code coverage?

    I think CDN just change the name, and make the GUI more comfortable and compatible with other tools in Incisive platform.
  5. A

    SOP expression coverage

    sop expression evaluates to a constant hi, anybody can give me an explanation of SOP expression coverage? I got this warning message from IUS55 coverage ncelab: *W,COVSEC: (/export/home/xxx/prj/IP/uart/rtl/uart_dpll.v,115|22): SOP expression evaluates to a constant: not checked thanks a lot!:D
  6. A

    What tools can do code coverage?

    ICT is removed from IUS55, the new coverage tool is called ICC or Incisive Comprehensive Coverage, you can no longer use hdli or hdlr
  7. A

    What tools can do code coverage?

    -coverage is back in IUS5.5
  8. A

    Which one is better Vera or Specman?

    vera Vs specman specman will have a new release soon under cadence, we will get to know cadence's supporting strength of this splendid tool then.
  9. A

    functional coverage using psl

    just a correction, psl DO support functional coverage, plese refer to the latest IUS document about abv
  10. A

    is there a lsf equivalent open source tool?

    lsf equivalent opensource lsf is the load share facility from Platform Inc. is there a lsf equivalent open source tool? thanks
  11. A

    What do u mean by design for verification

    I think rtl with well coded structural assertion is some kind of DFV
  12. A

    what is formal verification

    Both model/property checking and equivalence checking are formal verification technologies. As I know, both lec and formality is equivalence checking tool. Which tools are used for model/property checking? Thanks
  13. A

    SoC system level simulation

    I also use verilog/python/psl currently. The future is not clear. I hope specman can be the winner.
  14. A

    What do you think of Incisive Unified Simulator vs. VCS

    simulation profile vcs IUS is not just a simulator any more.
  15. A

    What do you think of Incisive Unified Simulator vs. VCS

    cadence incisive unified simulator ldv VCS's new version will support SystemC, IUS's support for systemverilog is bad!
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