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Threads 1 to 30 of 19088

Forum: PLD, SPLD, GAL, CPLD, FPGA Design

Simple and Complex Programmable Logic Devices from Altera, Cypress, Xilinx. Field Programmable Gate Array. Device specific VHDL/Verilog/SystemC questions.

  1. Sticky Thread Sticky: IEEE Standard for Standard SystemC® Language Reference Manual

    Started by bassa, 17th January 2012 03:22
    • Replies: 2
    • Views: 6,313
    2nd June 2013, 16:13 Go to last post
  2. Sticky Thread Sticky: ALL E-BOOKS HERE WILL BE DELETED!!! USERS WILL BE WARNED !!!

    Started by klug, 21st March 2007 21:21
    • Replies: 0
    • Views: 13,704
    21st March 2007, 21:21 Go to last post
  1. Sine Wave Generation on an FPGA

    Started by Christian Chetcuti, 28th October 2014 08:19
    • Replies: 4
    • Views: 146
    Yesterday, 17:01 Go to last post
    • Replies: 3
    • Views: 93
    Yesterday, 15:00 Go to last post
  2. 16 bit carry look ahead adder

    Started by Mkhitar Ghazaryan, Yesterday 13:47
    • Replies: 1
    • Views: 41
    Yesterday, 14:33 Go to last post
  3. DAC on STRATIX II EP2S60

    Started by mehanathan, Yesterday 10:43
    • Replies: 1
    • Views: 44
    Yesterday, 13:25 Go to last post
  4. FPGA Kit and Better HDL

    Started by pavan garate, 26th October 2014 07:09
    • Replies: 10
    • Views: 423
    Yesterday, 08:49 Go to last post
    • Replies: 1
    • Views: 104
    Yesterday, 03:21 Go to last post
  5. "whack-a-mole" game prototype using FPGA

    Started by zilch, 30th October 2014 03:13
    • Replies: 11
    • Views: 227
    Yesterday, 02:15 Go to last post
    • Replies: 1
    • Views: 149
    Yesterday, 00:47 Go to last post
  6. Writing a verilog code for a crossbar switch

    Started by prasan61, 6th November 2011 18:58
    • Replies: 4
    • Views: 1,480
    30th October 2014, 16:35 Go to last post
  7. 8 bit sine wave to a 12 bit input dac

    Started by Christian Chetcuti, 30th October 2014 09:31
    • Replies: 2
    • Views: 89
    30th October 2014, 14:17 Go to last post
  8. preferred design for floating point comparision

    Started by seeker_123, 29th October 2014 13:34
    • Replies: 7
    • Views: 221
    30th October 2014, 14:05 Go to last post
  9. Choice of Hardware for SATA

    Started by Sunayana Chakradhar, 24th October 2014 20:55
    • Replies: 8
    • Views: 583
    30th October 2014, 01:36 Go to last post
    • Replies: 3
    • Views: 93
    29th October 2014, 19:54 Go to last post
  10. square root output in two clockcycle....

    Started by dipin, 27th October 2014 12:42
    • Replies: 15
    • Views: 430
    FvM
    29th October 2014, 08:20 Go to last post
    • Replies: 3
    • Views: 133
    28th October 2014, 14:48 Go to last post
  11. is there any spice model for fpga?

    Started by Amin Khorsandi, 28th October 2014 08:57
    • Replies: 3
    • Views: 164
    28th October 2014, 14:05 Go to last post
  12. [SOLVED] cordic calculations of sine and cosine functions in fpga

    Started by brainiac_rus, 27th October 2014 16:05
    • Replies: 4
    • Views: 161
    28th October 2014, 10:38 Go to last post
  13. Memory Conflict in Xilinx

    Started by Gayathrirani, 28th October 2014 07:12
    • Replies: 1
    • Views: 100
    28th October 2014, 09:18 Go to last post
  14. Bit flipping in SRAM

    Started by Manzar Mahmud, 28th October 2014 04:14
    • Replies: 0
    • Views: 62
    28th October 2014, 04:14 Go to last post
  15. if condition under fork funtion

    Started by mahalakshmi r, 27th October 2014 20:54
    • Replies: 2
    • Views: 114
    27th October 2014, 21:50 Go to last post
  16. Verilog Quad 7-seg display

    Started by Azaxa, 24th October 2014 21:15
    • Replies: 16
    • Views: 705
    FvM
    27th October 2014, 18:20 Go to last post
    • Replies: 0
    • Views: 82
    27th October 2014, 16:29 Go to last post
  17. VHDL : Booth Multiplier Radix 4

    Started by karan123, 27th October 2014 13:30
    • Replies: 1
    • Views: 82
    27th October 2014, 16:09 Go to last post
  18. mulipler matrix in verilog

    Started by mohammadmother, 27th October 2014 14:47
    • Replies: 0
    • Views: 86
    27th October 2014, 14:47 Go to last post
  19. [moved] VHDL flash memory controller

    Started by shrutireddy, 27th October 2014 06:40
    • Replies: 1
    • Views: 75
    27th October 2014, 13:48 Go to last post
  20. Partial Reconfiguration and Scrubbing

    Started by msdarvishi, 25th October 2014 23:44
    • Replies: 3
    • Views: 254
    27th October 2014, 10:04 Go to last post
  21. FPGA in Altium. simple questions

    Started by Amin Khorsandi, 27th October 2014 06:16
    • Replies: 1
    • Views: 106
    27th October 2014, 09:26 Go to last post
  22. how to convert verilog into schematic in OS X?

    Started by simongu89, 21st October 2014 06:26
    • Replies: 3
    • Views: 543
    27th October 2014, 09:24 Go to last post
  23. [SOLVED] Tiny encription algorithm (TEA) in VHDL need help

    Started by emperror123, 26th October 2014 04:24
    • Replies: 6
    • Views: 295
    FvM
    27th October 2014, 09:01 Go to last post
    • Replies: 0
    • Views: 83
    27th October 2014, 07:51 Go to last post

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