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Threads 1 to 30 of 19519

Forum: PLD, SPLD, GAL, CPLD, FPGA Design

Simple and Complex Programmable Logic Devices from Altera, Cypress, Xilinx. Field Programmable Gate Array. Device specific VHDL/Verilog/SystemC questions.

  1. Sticky Thread Sticky: IEEE Standard for Standard SystemC® Language Reference Manual

    Started by bassa, 17th January 2012 04:22
    • Replies: 2
    • Views: 7,381
    2nd June 2013, 17:13 Go to last post
  2. Sticky Thread Sticky: ALL E-BOOKS HERE WILL BE DELETED!!! USERS WILL BE WARNED !!!

    Started by klug, 21st March 2007 22:21
    • Replies: 0
    • Views: 14,537
    21st March 2007, 22:21 Go to last post
  1. floating point input in verilog

    Started by GARNETWILSON, 2nd March 2015 10:48
    • Replies: 5
    • Views: 93
    Today, 17:21 Go to last post
    • Replies: 1
    • Views: 39
    Today, 17:11 Go to last post
  2. how to find arctanh.........

    Started by dipin, Yesterday 14:28
    • Replies: 2
    • Views: 78
    Today, 12:53 Go to last post
  3. Altera Boot Nios2 from EPCS16 using cyclon3

    Started by ashraf123, 2nd March 2015 15:52
    • Replies: 2
    • Views: 75
    Today, 10:18 Go to last post
    • Replies: 2
    • Views: 42
    Today, 10:05 Go to last post
    • Replies: 0
    • Views: 70
    Today, 03:05 Go to last post
    • Replies: 10
    • Views: 167
    FvM
    Yesterday, 20:01 Go to last post
  4. fixed point representation

    Started by lokesh@88, Yesterday 16:46
    • Replies: 3
    • Views: 75
    K-J
    Yesterday, 17:56 Go to last post
  5. VHDL simulating a phase shifted clock

    Started by shaiko, 2nd March 2015 12:54
    • Replies: 10
    • Views: 129
    Yesterday, 16:36 Go to last post
  6. Interfacing FPGA and DDR3

    Started by DEVI403, Yesterday 13:54
    • Replies: 0
    • Views: 35
    Yesterday, 13:54 Go to last post
  7. What features are missing from popular EDA languages?

    Started by vGoodtimes, 27th February 2015 08:02
    • Replies: 10
    • Views: 351
    Yesterday, 09:05 Go to last post
    • Replies: 2
    • Views: 76
    Yesterday, 08:10 Go to last post
  8. A question for semaphore channel in SystemC

    Started by william_luo, 1st March 2015 20:33
    • Replies: 1
    • Views: 97
    2nd March 2015, 22:32 Go to last post
  9. color recognizer on Atmet

    Started by JamilMirza, 2nd March 2015 21:25
    • Replies: 0
    • Views: 45
    2nd March 2015, 21:25 Go to last post
  10. Xilinx PCI-e 7 series interrupts and data

    Started by Titormos, 2nd March 2015 19:22
    • Replies: 0
    • Views: 49
    2nd March 2015, 19:22 Go to last post
  11. [SOLVED] Simulation error: module not found

    Started by LatticeSemiconductor, 26th February 2015 18:59
    • Replies: 7
    • Views: 221
    2nd March 2015, 15:39 Go to last post
  12. Static Timing Analysis

    Started by srrameshonline, 27th February 2015 07:16
    • Replies: 4
    • Views: 121
    2nd March 2015, 07:56 Go to last post
  13. Writing ADC data into DDR3RAM using Virtex7 fpga (vhdl)

    Started by rahdirs, 24th February 2015 05:04
    • Replies: 6
    • Views: 244
    2nd March 2015, 07:07 Go to last post
  14. Using high impedance state with Verilog register

    Started by SamV, 27th February 2015 20:35
    • Replies: 6
    • Views: 180
    2nd March 2015, 02:08 Go to last post
  15. altera s80 dsp kit HELP...

    Started by Muhammad Amir, 1st March 2015 10:29
    • Replies: 3
    • Views: 82
    1st March 2015, 19:03 Go to last post
  16. Traffic light controller has no output

    Started by alikaradag, 19th November 2014 23:50
    • Replies: 5
    • Views: 634
    1st March 2015, 14:37 Go to last post
  17. FPGA Programmer Circuit

    Started by prakhars, 20th January 2015 17:24
    • Replies: 5
    • Views: 281
    28th February 2015, 19:57 Go to last post
    • Replies: 1
    • Views: 105
    28th February 2015, 19:23 Go to last post
  18. Digilent Basys2 LED issue

    Started by becko1, 27th February 2015 18:21
    • Replies: 4
    • Views: 167
    27th February 2015, 23:40 Go to last post
  19. Is there anyway to combine 2 .elf files together ?

    Started by beginner_EDA, 18th February 2015 19:29
    • Replies: 2
    • Views: 197
    27th February 2015, 09:31 Go to last post
  20. New technique for pulse-width functions

    Started by sdc18, 26th February 2015 04:13
    • Replies: 5
    • Views: 188
    26th February 2015, 17:15 Go to last post
    • Replies: 10
    • Views: 11,302
    26th February 2015, 00:15 Go to last post
  21. Change in functioning of FSM

    Started by Tapojyoti Mandal, 25th February 2015 14:32
    • Replies: 2
    • Views: 120
    FvM
    25th February 2015, 17:08 Go to last post
    • Replies: 0
    • Views: 75
    25th February 2015, 16:55 Go to last post
    • Replies: 3
    • Views: 173
    25th February 2015, 16:52 Go to last post

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