Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Xilinx system generater

Status
Not open for further replies.
A

ankitk1990

Newbie level 3
Newbie level 3
Joined
Jun 30, 2011
Messages
4
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,311
I wanted to map 4 bits to 1 symbol in an input data stream using system generator in simulink..I am trying to use downsample but am not sure if its correct..
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top