Xilinx ML310 EDK Base Design Problem

[moving2]

Hi All,

I am having a problem with the Xilinx ML310 EDK Base Design:
https://www.xilinx.com/products/boards/ml310/current/#base

I am using ISE/EDK 9.1i 32 bit on Linux. I've gone through the tutorial and produced the bitstream, downloaded it to the board, but I do not see the specified output on the serial port.

I know the serial port is working because I see the ML310 Diagnostics / ACE-loader / ACE CD Configuration comes up on the serial port on powerup.

I have chosen to load the Memory Test App into the BRAM and the bitstream loads successfully, I just do not get anything on the serial port. Any suggestions?

Update 1: I'm actually not sure the bitstream downloaded properly, as further reading seems to imply that that the "DONE" statement in the console does not necessarily mean all went well. Also, when I launch XMD, it displays some text and then the window closes- do you know where the logfile for this is located? The window closes too fast for me to read the text.

Update 2: I'm seeing this warning when following the base demo:

"/home/v/vs_base_design/base_system_2.mhs Line 174 - No driver found for instance opb. To avoid seeing this warning, assign the appropriate driver or driver "generic 1.00.a" to instance opb

Is this a problem? Why is this happening, could this explain my problem, and how can I fix it?

Update 3: I tried to build the ML310 base demo project again in EDK/XPS 9.1i, I did everything exactly as I did before (I even tried to build the project from the beginning 3 times in a row just now, each time with a new project just to make sure) and now I am getting the following error in XPS during bitstream generation:

"Applying constraints in "system1.ucf" to the design...
ERROR:NgdBuild:756 - "system1.ucf" Line 272: Could not find net(s)
'SysACE_CompactFlash_SysACE_CLK' in the design. To supress this error
specify the correct net name or remove constraint.
..."

and other similar errors with 'could not find instances' referring to:

bufgp_115/BUFG
system dcm/system_dcm/CLK0_BUFG_INST
system dcm/system_dcm/CLK90_BUFG_INST
system dcm/system_dcm/CLK180_BUFG_INST
system dcm/system_dcm/CLK270_BUFG_INST
ddr_dcm/ddr_dcm/CLK90_BUFG_INST
ddr_dcm/ddr_dcm/CLK270_BUFG_INST
ddr_dcm/ddr_dcm/CLK0_BUFG_INST
ddr_dcm/ddr_dcm/DCM_INST
ddr_dcm/system_dcm/DCM_INST

Again, I am following the instructions to the letter. I have searched the Answer Records and I cannot find anything referring to this problem. Any ideas? This is becoming very frustrating.

Thanks,
V

 

[aruipksni]

Hi All,

I am having a problem with the Xilinx ML310 EDK Base Design:
https://www.xilinx.com/products/boards/ml310/current/#base

I am using ISE/EDK 9.1i 32 bit on Linux. I've gone through the tutorial and produced the bitstream, downloaded it to the board, but I do not see the specified output on the serial port.

I know the serial port is working because I see the ML310 Diagnostics / ACE-loader / ACE CD Configuration comes up on the serial port on powerup.

I have chosen to load the Memory Test App into the BRAM and the bitstream loads successfully, I just do not get anything on the serial port. Any suggestions?

Update 1: I'm actually not sure the bitstream downloaded properly, as further reading seems to imply that that the "DONE" statement in the console does not necessarily mean all went well. Also, when I launch XMD, it displays some text and then the window closes- do you know where the logfile for this is located? The window closes too fast for me to read the text.

Update 2: I'm seeing this warning when following the base demo:

"/home/v/vs_base_design/base_system_2.mhs Line 174 - No driver found for instance opb. To avoid seeing this warning, assign the appropriate driver or driver "generic 1.00.a" to instance opb

Is this a problem? Why is this happening, could this explain my problem, and how can I fix it?

Update 3: I tried to build the ML310 base demo project again in EDK/XPS 9.1i, I did everything exactly as I did before (I even tried to build the project from the beginning 3 times in a row just now, each time with a new project just to make sure) and now I am getting the following error in XPS during bitstream generation:
"Applying constraints in "system1.ucf" to the design...
ERROR:NgdBuild:756 - "system1.ucf" Line 272: Could not find net(s)
'SysACE_CompactFlash_SysACE_CLK' in the design. To supress this error
specify the correct net name or remove constraint.
..."
and other similar errors with 'could not find instances' referring to:
bufgp_115/BUFG
system dcm/system_dcm/CLK0_BUFG_INST
system dcm/system_dcm/CLK90_BUFG_INST
system dcm/system_dcm/CLK180_BUFG_INST
system dcm/system_dcm/CLK270_BUFG_INST
ddr_dcm/ddr_dcm/CLK90_BUFG_INST
ddr_dcm/ddr_dcm/CLK270_BUFG_INST
ddr_dcm/ddr_dcm/CLK0_BUFG_INST
ddr_dcm/ddr_dcm/DCM_INST
ddr_dcm/system_dcm/DCM_INST

Again, I am following the instructions to the letter. I have searched the Answer Records and I cannot find anything referring to this problem. Any ideas? This is becoming very frustrating.

Thanks,
V

have you ever tried to run the program ? you probebly need to run it (play it) from the debugger /xmd.
if you need to run it directly from bram you need to combine it with bit file.
if you need to run it directly from ddr you probebly need a boot loader.
the error you are getting are because your project doesn't suit the ucf file you specified, that probebly
belong to other project, so try to get fresh copy of sample apllication, don't mess with the files, and just run it
like it should be run.

 

[bigdogguru]

I am using ISE/EDK 9.1i 32 bit on Linux. I've gone through the tutorial and produced the bitstream, downloaded it to the board, but I do not see the specified output on the serial port.

Unfortunately, the Xilinx ML310 EDK Base Design you are referring to was implement using EDK 6.2i SP2 / ISE 6.2i SP3.

Frankly, it is not surprising there are issues when you attempt synthesis and compile it using ISE/EDK 9.1i.

The error messages indicate there is a mismatch between the system1.ucf and various modules during build phase.


First have you check your ISE/EDK 9.1i installation for any more recent demo/base designs for the ML310?

If there are none, I would suggest build a new "base design" from scratch within ISE/EDK 9.1i.


BigDog

 

[moving2]

bigdogguru and aruipksni- thanks for your responses.

aruipksni- please see below, I think this responds to your suggestion, as well:

bigdog- I'm not sure why 6.X vs. 9.X would make a difference. I am building the base design from the instructions in the PDF. On this page you'll see
these files:
"ml310_base_design_creation.pdf"
"ml310_base_mhs_update.zip"
"ml310_base_ucf_update.zip"

Unless I am mistaken, the PDF is describing building a design from scratch. This is what I'm doing, and when I get to the "generate bitstream" step, I am running into the errors I've described. Any ideas here?

 

[bigdogguru]

Are you not using the files from the link you provided?

The Xilinx forum is littered with issues concerning migration of designs from one version to the higher version of the EDK and ISE.

Anyway, I managed to find a zip containing an reconfigurable computing course utilizing the ML310 and EDK/ISE v9.1, I have attached zip file.

Review the lectures and then the labs, hopefully it will step you through the process.

Also, you might want to checkout the following text, which utilizes the ML510, a few revs past the ML310:

Embedded Systems Design with Platform FPGAs: Principles and Practices

BigDog

 

[moving2]

bigdog- thanks for the response.

Are you not using the files from the link you provided?

The files from the link I provided are not design files. They consist of a PDF describing how to build a project from scratch all the way to interacting with it on the board, along with UCF and MHS updates. Would really like to figure out why this isn't working since I am building it from scratch according to the instructions. Any suggestions would be appreciated.

Anyway, I managed to find a zip containing an reconfigurable computing course utilizing the ML310 and EDK/ISE v9.1, I have attached zip file.

I already came across these and started the tutorials, but thanks for taking the time to search for that for me. Will see if I can get past the xmd hurdle on the tutorials. When I launch XMD from XPS, it displays some text and then the window closes- do you know where the logfile for this is located? The window closes too fast for me to read the text.

Also, you might want to checkout the following text...

Awesome, thanks!

 

[bigdogguru]

It been a while since my last adventure with EDK/ISE.

I could step through the process and take notes, however the closest development board I have to the ML310 would be the XUPV2P and the only compatible EDK/ISE version I have would v10.1.

Maybe when I get the time I drag out my XUPV2P or another Virtex II Pro board I have and see what I do.

The text I mention in my last post is probably the best available for Xilinx FPGAs and EDK, although I also have an interest text on reconfigurable systems which is quite interesting.


BigDog

 

[moving2]

The text I mention in my last post is probably the best available for Xilinx FPGAs and EDK, although I also have an interest text on reconfigurable systems which is quite interesting.
BigDog

bigdog- do tell!

 

[bigdogguru]

I've only browsed the first few chapters, but it is one of the only text on Reconfigurable Computing I've come across:

Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation

Also you might want to checkout Chu's latest text:

Embedded SoPC Design with Nios II Processor and VHDL Examples

Embedded SoPC Design with Nios II Processor and Verilog Examples

Of course they are NIOS II and Altera centric, so they may not be of interest.

BigDog