Xilinx ISE: Error Security : 12

[symlet]

Hai all,

I have fpga board with spartan device (xc3s2000) and I use Xilinx ISE Design Suite 14.2 that I download from internet. My problem is when I select device xc3s2000 in ISE and compile the vhdl code, this error message come out:

ERROR:Security:12 - No 'xc3s2000' feature version 2012.07 was available (-5),
ERROR:Map:258 - A problem was encountered attempting to get the license for this
architecture.

Is it because I don't have a license? How to manage this error,since I don't have full version. Can I use different fpga device (not xc3s2000) in ISE for synthesis and after successfully compile it, I download to the fpga board (with xc3s2000)? Is it possible? Thanks in advance

 

[rberek]

The WebPack version of ISE is only for use with a subset of the Xilinx FPGAs. It may be that the one you have selected can only be built with the full paid edition of ISE. If that is the case you will have to pick a new FPGA or buy the full edition.

Do not build for one FPGA and load the bitfile on another. It will not work and bad things could happen.

r.b.

 

[mrflibble]

See https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/irn.pdf page 31 for a list of supported devices. I think you managed to pick one of the few spartan-3's that's actually not supported by the free version.

Can I use different fpga device (not xc3s2000) in ISE for synthesis and after successfully compile it, I download to the fpga board (with xc3s2000)? Is it possible?

Nope, that won't work.

 

[symlet]

Hai rberek and mrflibble,

Actually I used ISE to write some process (vhdl code). Then, I used another software which Labview to build the whole process and insert the bitfile of the vhdl code. Labview will check the syntax error of the bitfile and download it in fpga when I run the project. I have try this and the result shows right value (in Labview) even I not specify the right fpga device in ISE. Is it I do a wrong thing? As you said, is it will damage the fpga board? I hope it is not necessary to buy a license ISE because I do not have it. Really need helps and hope any other ways.

Btw, I have check the pdf file. For ISE Design Suite (All other editions) it support all Spartan-3 fpga. Is it this ISE Design Suite free to download and doesn't require a license? Thanks in advance

 

[rberek]

I have never used Labview to program an FPGA, but from what I understand, it can only program specific National Instrument FPGA hardware tagets, not generic FPGA boards. Perhaps someone else can comment on that.

If you have one of these targets, and are programming it via Labview, then you should be fine. If not, then loading a bitfile from on FPGA onto another can at best, not work, or at worst, smoke something. I have seen that happen. The I/O assignments from one FPGA meant for one board can play havoc if you program that on a different FPGA with a different IO arrangement. On big boards with many FPGAs, a great deal of attention is paid to keeping bitfiles straight so as not to cause major problems like this.

However, it is not at all clear exactly what you have done with Labview. What sort of board is this FPGA on?

r.b.

r.b.

 

[mrflibble]

Btw, I have check the pdf file. For ISE Design Suite (All other editions) it support all Spartan-3 fpga. Is it this ISE Design Suite free to download and doesn't require a license?

Why do you think I mentioned what column to use in that table? What edition do you have installed, then lookup table in that column. If you have no license, then you're using the free webpack edition. And as such no xc3s2000 for you!</soup_nazi>

 

[symlet]

If you have one of these targets, and are programming it via Labview, then you should be fine. If not, then loading a bitfile from on FPGA onto another can at best, not work, or at worst, smoke something. I have seen that happen. The I/O assignments from one FPGA meant for one board can play havoc if you program that on a different FPGA with a different IO arrangement. On big boards with many FPGAs, a great deal of attention is paid to keeping bitfiles straight so as not to cause major problems like this.

However, it is not at all clear exactly what you have done with Labview. What sort of board is this FPGA on?

r.b.

r.b.

Hai rberek,

I have fpga single board RIO (sbRIO 9632) with Spartan device. In Labview there is tool/vi that I use to select this fpga (sbRIO9632). Moreover, labview allow user to use a bitfile for take part in the project. I have the fpga target in labview, but I don't have the fpga target in ISE. If I ignore the fpga target in ISE is it okay? I'm afraid if my board damage as you said smoke something,etc. However, I have done a small task before this, and nothing happen and the fpga board function as programmed. Need advice,thanks in advance

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Why do you think I mentioned what column to use in that table? What edition do you have installed, then lookup table in that column. If you have no license, then you're using the free webpack edition. And as such no xc3s2000 for you!</soup_nazi>

Hai mrflibble,

Sorry, I have no license. So,as you said I use the webpack edition. Thank you

 

[rberek]

It looks like you have one of the NI targets I mentioned. As I said, I have never used the Labview FPGA environment, but given that it appears to support your board, I expect there will be no issues with you building the bitfile and configuring the device in Labview as long as you follow their instructions. Since free ISE doesn't support your device, you should forget about using it. Instead, use the Labview tools, whatever they may be.

r.b.

 

[mrflibble]

Does your labview workflow work if you 1) don't have a bitfile 2) dont have ISE installed? I am pretty confident the answer is going to be no. Why? Because labview will no need either a ready to go bitfile as you pointed out OR will have to call the ISE synthesis tools (xst and the like). So if you don't have a ready to go bitfile for your big fpga you will have to somehow generate it. And that is what ISE will do for you, not labview. If it did, that would be a very novel agreement between NI and Xilinx. So whatever you can select in labview ... it doesn't matter. What targets you are actually allowed to use based on your license (or lack thereof) .. that does matter.

Hope that explains it...

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Instead, use the Labview tools, whatever they may be.

Yes, that. Especially the "whatever they may be". I can only imagine that it's using pre-existing bitfiles for his target fpga. Or does NI have a license agreement for some synthesis tech?

Mmmh, or maybe it is one of those vendor locked thingies (forgot the specific term). That might work too. You can see if that's the case by the command line options that are used when labview calls xst for example. Assuming that labview is indeed calling xst, but that seems likely.

 

[rberek]

Taking a quick look, Labview has some graphical method of programming these targets without using an HDL. Thay have a webcast on the procedure but I don't have time to watch it. This will have to remain "whatever that might be" to me

r.b.

 

[mrflibble]

This will have to remain "whatever that might be" to me

Same here. Maybe symlet can enlighten us?