Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Xilinx Core Generator on HDL Designer

Status
Not open for further replies.

AMCC

Member level 2
Joined
May 31, 2001
Messages
44
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
396
hdl designer xilinx

I have updated Xilinx Cores for Core Generator and now when I Invoke CoreGen from HDLDesigner at the end of the process (after generating the core in CoreGen) HDLDesigner gives the fowlling error : Failed to generate xxx (on Status Window).

I have alreay re-compiled all libraries.

Can any one help me on this.

Than you very much.

AMCC
 

Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top