I don't see a reason to believe that all the layers are connected
by vias. Alternating layers -should- be. DRC says they are not.
I think you are missing the "stubs" to make that so. A
M3/V3/M4/V4/M5 stub-stack, where M4 is spaced from the
cap-plate anf M3, M5 connect those plates; A M2/V2/M3/V3/M4
stub-stack where M3 is spaced and M2, M4 conect.
Those "stubs" will be your connections to the rest of the circuit
(well, you could connect to anywhere on the plates).